Commit Graph

3 Commits

Author SHA1 Message Date
Alex Waterman
6dd57c29b0 gpu: nvgpu: Move gm206 HW headers
Move the gm206 HW headers to a new directory specially for them:

  include/nvgpu/hw/gm206

And change the code to include like so:

  #include <nvgpu/hw/gm206/hw_fb_gm206.h>

This is part of the process to restructure the nvgpu driver.

Bug 1799159

Change-Id: I90dc39e64e1b58ee9e87fbc26ad0d18c361e239c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1244792
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-01-11 12:44:14 -08:00
Lakshmanan M
7f6fede92c gpu: nvgpu: fix sparse warnings
Fixed the following sparse warnings:
- warning: symbol 'gm206_ce_isr' was not declared.
           Should it be static?
- warning: symbol ''gm206_ce_nonstall_isr' was not declared.
           Should it be static?

Bug 200088648

Change-Id: I30f66ba4225d5544d6110bc4a70235234ad4001d
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1161604
Reviewed-by: Amit Sharma (SW-TEGRA) <amisharma@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-10 12:24:59 -07:00
Lakshmanan M
6299b00beb gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
   for gm206 GPU family
5) Added generic mechanism to identify the
   CE engine pri_base address for gm206
   (CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
   made generic way
7) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2016-06-07 12:31:34 -07:00