Commit Graph

9922 Commits

Author SHA1 Message Date
Arto Merilainen
177e4e4735 gpu: nvgpu: Store gpu config
This patch adds necessary code to store the gpu configuration into
gr structure.

Bug 1409151

Change-Id: I045b21ebdc849833380a3d953d951f8352842ac7
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:05 -07:00
Deepak Nibade
ba03fd69dd gpu: nvgpu: gk20a: fix syncpt waiting debug print
debug print "Waiting on syncpt" for gpu channel prints that
channel is waiting for the syncpt without checking the state
of the channel

hence modify this print as follows :

if channel is in "pending acquire" or "on_eng_pending_acquire"
state we print "Waiting on syncpt"
otherwise we print "Waited on syncpt"

Bug 1305024

Change-Id: Ie22db689d6e8016c63158e8961d2233042069bec
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/394715
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:04 -07:00
Prashant Malani
8bef793145 gpu: nvgpu: gk20a: Enable railgating
Bug 1494200
Bug 1492505

Change-Id: I77bbe4f775780e80de1b8f9279be82926f3ed7c9
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/393738
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seema Khowala <seemaj@nvidia.com>
Tested-by: Seema Khowala <seemaj@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Chao Xu <cxu@nvidia.com>
2015-03-18 12:09:03 -07:00
Prashant Malani
bc563de0bf gpu: nvgpu: gk20a: disable devfreq before gk20a
Ensure devfreq is disabled before shutting down gk20a, to prevent
possible races with reading of gpu load, and the shutdown of gpu itself.

Bug 1492913

Change-Id: I016fdba9515120fc6cf3e771f60c61b9bf2027cb
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/394296
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:02 -07:00
Shridhar Rasal
b210a775cf gpu: nvgpu: gk20a: fix genpd name
domain name should be different from device name.

Change-Id: I6c7d6927d6fc5bada203d749f107c17043233501
Signed-off-by: Shridhar Rasal <srasal@nvidia.com>
Reviewed-on: http://git-master/r/392327
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:02 -07:00
Lauri Peltonen
9c5d336fb7 gpu: nvgpu: Don't request host1x irq on channel wfi
Fix regression caused by commit 67fa249b419d32bfd0873fe5d924f4f01d9048de
"video: tegra: host: Abstract gk20a channel synchronization".

The above change unintentionally modified the channel synchronization
logic so that an nvhost interrupt handler was scheduled also when idling
the channel in gk20a_channel_submit_wfi. That appears to cause
intermittent hangs when running CUDA tests.

Bug 1484824

Change-Id: I4a1f85dd9e6215350f93710a2be9b0bbaef24b8f
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/394127
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Prashant Malani
9727cf87bc video: tegra: host: gk20a: reorder free_irq
Free IRQs before the various subunits are suspended. This is to prevent
potential races between the IRQ thread and the suspend routine.

Bug 1437749

Change-Id: Iffef918feecae0b256be96efd02b01b2677c225d
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Arto Merilainen
ef4ed26f8b gpu: nvgpu: Remove redundant locked variable
Queue locked variable holds entirely redundant information about the
queue status and having the variable causes a race between lock() and
unlock() functions. This patch removes the locked variable.

Bug 1495617

Change-Id: I05682bfe7a23acc77c2bfe405938ace7d2b3d081
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/393431
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:01 -07:00
Arto Merilainen
c38dae5b52 gpu: nvgpu: Export pde coverage
This patch adds a field to the gpu capability ioctl to allow
requesting the maximum VA a single PDE entry can hold.

Bug 1456570

Change-Id: I5cf29c8816fa6ea396c36419e6821c27a805b8af
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
fa6f7f882d gpu: nvgpu: gk20a: remove code duplication
Bug 1443071

Change-Id: I225114835a5923061462e238395798b274cadd7b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
f5fe93456f gpu: nvgpu: gk20a: add syncpt id checks
add valid syncpt id checks when syncpt id is
extracted from fence fd

Bug 1448825

Change-Id: I0f1722aad60e7644b8f490f24cf18a3b80f8583c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/390572
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:09:00 -07:00
Deepak Nibade
65c230fc83 gpu: nvgpu: gk20a: always map ptes for 64 bit arch
On 64 bit architecture, we have plenty of vmalloc space
so that we can keep all the ptes mapped always
But on 32 but architecture, vmalloc space is limited and
hence we have to map/unmap ptes when required

Hence add new APIs for arch64 and call them if
IS_ENABLED(CONFIG_ARM64) is true

Bug 1443071

Change-Id: I091d1d6a3883a1b158c5c88baeeff1882ea1fc8b
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/387642
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:59 -07:00
Kevin Huang
ea76deaa6a video: tegra: host: fix the bundle corruption
Wait for FE idle between SW bundles.

Bug 1477234
Bug 1486347
Bug 1485069

Change-Id: I5181b1240fff73cfecd07aa3e54076cde800ea00
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/391591
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:59 -07:00
Prashant Malani
bde3d332f9 video: tegra: host: gk20a: reorder init save zbc
During the ELPG initialization routine, ELPG should be explicitly
disabled before we save the zbc table. This ensures that even if there
is a preemption from some other thread that calls ELPG enable/disable,
the ref counting will ensure that ELPG remains disabled.

Bug 1490085

Change-Id: Ie8eeaf48dda4e7f810aa26926facf63753e86abe
Signed-off-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-on: http://git-master/r/382273
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mitch Luban <mluban@nvidia.com>
2015-03-18 12:08:58 -07:00
Kerwin Wan
efad6452f6 gpu: nvgpu: handle error when gpu failed to unpowergate
After flash, kernel needs to reboot after first boot.
During reboot, devices is going to be shutdown including i2c.
But sometimes gpu driver trys to open gpu sysfs nodes and
unpowergate gpu at the same time. But i2c is already shutdown.
tegra_unpowergate_partition returns error in this case but
gk20a_tegra_unrailgate did not report the error so the error
is not handled. Return proper value in gk20a_tegra_unrailgate
to avoid this.

Bug 1488409

Change-Id: I3470ad44a0047ae9b06f5907162ccf51795a5e04
Signed-off-by: Kerwin Wan <kerwinw@nvidia.com>
Reviewed-on: http://git-master/r/390688
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Prashant Malani <pmalani@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:57 -07:00
Deepak Nibade
f3f9677c57 gpu: nvgpu: gk20a: fix syncpt names for gk20a
nvhost_get_syncpt_host_managed() creates syncpt name based on
platform_device pointer passed to it
Passing host1x's pointer to this API results in setting gk20a
syncpt names as "host1x_0" which is conflicting

Hence to restore this pass gk20a's device pointer
which gives syncpt names as "gk20a.0_0"

Bug 1305024

Change-Id: I40325f2e4e2d9ea8de1d44e136edcb48a431e45c
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/389671
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:56 -07:00
Terje Bergstrom
0d908e51c8 gpu: nvgpu: Check bar1 bind
Add two fb flushes after bar1 bind. This should hang the thread instead
of whole system in case there is a BAR1 hang.

Change-Id: I2385a243711219297b889daa30c9fc81106e5825
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/390183
2015-03-18 12:08:55 -07:00
Terje Bergstrom
4a8f0db379 gpu: nvgpu: gk20a: Fix G_ELPG flush poll
We poll completion of flush sequence by polling the broadcast
register. The polling should be done for a per-slice register
instead.

Bug 1457723

Change-Id: I10aba939175b6d05b05f5f26eebebcbe09d9b4a7
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/382521
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Tested-by: Juha Tukkinen <jtukkinen@nvidia.com>
2015-03-18 12:08:54 -07:00
Kevin Huang
b5acc421ee video: tegra: host: flexible to select fw per chip
Decouple the firmware selection of different gpu architecture.

Change-Id: I62bf6b3bc51a8606c5973e475988cd5987a65a1a
Signed-off-by: Kevin Huang <kevinh@nvidia.com>
Reviewed-on: http://git-master/r/389793
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:54 -07:00
Arto Merilainen
a9785995d5 gpu: nvgpu: Add NVIDIA GPU Driver
This patch moves the NVIDIA GPU driver to a new location.

Bug 1482562

Change-Id: I24293810b9d0f1504fd9be00135e21dad656ccb6
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/383722
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:53 -07:00
Lauri Peltonen
61efaf843c video: tegra: host: Abstract gk20a channel synchronization
Move all channel synchronization code to new channel_sync_gk20a.c/h
files, and access all synchronization functions through function
pointers. This is groundwork for supporting semaphore based channel
synchronization.

Bug 1434573
Bug 1450122

Change-Id: Ic21709c1ee8cf85d018616787988e7eebb399fbe
Signed-off-by: Lauri Peltonen <lpeltonen@nvidia.com>
Reviewed-on: http://git-master/r/374841
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:22 -07:00
Arto Merilainen
dd5e0b3da0 video: tegra: host: gk20a: Add own trace events
This patch modifies gk20a driver to use its own trace events instead
of trace events of nvhost.

Bug 1468086

Change-Id: I1f40ba957ec7e25904e9f4621346cb7dc256a550
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/374289
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-03-18 12:08:21 -07:00