Commit Graph

3493 Commits

Author SHA1 Message Date
seshendra Gadagottu
cf70c925cd gpu: nvgpu: gv11b: update css ops
Updated following hal functions for css gv11b and reused
them for gv100:
enable_snapshot
disable_snapshot
check_data_available

These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
   for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
   based on memory aperture used for hwpm inst_block.

Bug 200327596

Change-Id: I500d17670e2f389d8d0e77884374bcc3504a41f8
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1507546
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-20 19:03:56 -07:00
David Nieto
ed8ac6e005 gpu: nvgpu: fix smid generation of perf tables
SMID tables were generated according with the local tpc and the pagepool and cb
buffers from a different chip and did not take performance in consideration,
which made compute kernels hang with CTAs on the fly.

This change ensures we are using the right sizes and adds proper enumeration
of smids.

JIRA: NVGPUGV100-36
bug 2004378

Change-Id: Ic8f50c325d6d6720cca41d9740ae4f5f51e1100a
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581664
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-20 11:55:43 -07:00
David Nieto
8c5ea40cca gpu: nvgpu: handle smid table init failures
Handle the possibility of failing gr init due to smid table initialization
failures

bug 2004378

Change-Id: I904b918a0ea31c32292edb3ab8ac3b1459c38a28
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581661
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-20 11:55:38 -07:00
seshendra Gadagottu
387ecf8a63 gpu: nvgpu: gv1xx: Remove HAL for restore_context_header
gr restore_context_header is not required any more after
enabling per context va mode for subcontext. Cleaning-up
unused function pointers from gv100 and gv11b HAL.

Change-Id: I65cc7d12d3c96726d323defd99726c3e259e7e63
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581432
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-20 10:05:40 -07:00
seshendra Gadagottu
e492eb5bdd gpu: nvgpu: Remove HAL for restore_context_header
Remove unused HAL for restore_context_header.
This function pointer is not getting used since
no need for restoring context header during golden
context creation.

Change-Id: I0fb018226c7560fdb69f77a4f53387d39cc79e97
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581431
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-20 10:05:35 -07:00
Terje Bergstrom
98b08b413b gpu: nvgpu: Use sched_ctrl from nvgpu_os_linux
Sched has been moved to be part of Linux implementation, and at the
same time sched_ctrl has been moved to be part of nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I4c1869628ad716bcd903ba99db926a8f8723828d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580650
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
2017-10-20 10:05:29 -07:00
Terje Bergstrom
d7fe2fbacb gpu: nvgpu: Move sched to be Linux specific
Move sched parameter APIs to be Linux specific implementation. At
the same time the sched_ctrl fields were moved to nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I2397e2602e1c4783f2bebf3aec462634b7f86d4a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580649
GVS: Gerrit_Virtual_Submit
2017-10-20 10:05:29 -07:00
seshendra Gadagottu
a2c9c6ba05 gpu: nvgpu: reset perfmon correctly
Use mc reset HAL function to reset perfmon unit.
This will take care of delays after writing to
mc_enable register.

Change-Id: I6118bdd2a9fc9192f7ffc44617a170b7982c26ba
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581753
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-20 09:19:06 -07:00
Terje Bergstrom
58be11bbf5 gpu: nvgpu: Do not #include uapi in ecc_gk20a.h
ecc_gk20a.h has no use for Linux IOCTL interface definitions. Remove
the stray #include.

JIRA NVGPU-259

Change-Id: I47a837ac86f1f83976d94cb9b30082fee827445a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580678
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-10-19 16:05:05 -07:00
Alex Waterman
62e133029d gpu: nvgpu: Refactoring nvgpu_vm functions
Change required for equivalent change on nvgpu. This is required
since a few HALs were added that must be populated for all chips.

This patch adds those HAL definitions for gv11b, gv100, and the
vgpu.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I65374764350a5cacce8624b15d98947fada35a4a
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579865
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-18 16:01:08 -07:00
Mahantesh Kumbar
86ccbbde67 gpu: nvgpu: Remove Linux code from Boardobj
- Removed Linux headers included in boardobj.c

JIRA NVGPU-136

Change-Id: I37d4f7134e17f21c83bbff58ae12f52efb1e829f
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579670
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-18 16:01:03 -07:00
Alex Waterman
0853109c99 gpu: nvgpu: Refactoring nvgpu_vm functions
Refactor the last nvgpu_vm functions from the mm_gk20a.c code. This
removes some usages of dma_buf from the mm_gk20a.c code, too, which
helps make mm_gk20a.c less Linux specific.

Also delete some header files that are no longer necessary in
gk20a/mm_gk20a.c which are Linux specific. The mm_gk20a.c code is now
quite close to being Linux free.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I72b370bd85a7b029768b0fb4827d6abba42007c3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1566629
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-18 16:00:37 -07:00
Alex Waterman
b3446bc0b6 gpu: nvgpu: Move dma_buf usage from mm_gk20a.c
Move most of the dma_buf usage present in the mm_gk20a.c code
out to Linux specific code and some commom/mm code. There's
two primary groups of code:

  1. dma_buf priv field code (for holding comptag data)
  2. Comptag usage that relies on dma_buf pointers

For (1) the dma_buf code was simply moved to common/linux/dmabuf.c
since most of this code is clearly Linux specific.

The comptag code was a bit more complicated since there is two
parts to the comptag code. Firstly there's the code that manages
the comptag memory. This is essentially a simple allocator. This
was moved to common/mm/comptags.c since it can be shared across
all chips. The second set of code is moved to
common/linux/comptags.c since it is the interface between dma_bufs
and the comptag memory.

Two other fixes were done as well:

 - Add struct gk20a to the comptag allocator init so that
   the proper nvgpu_vzalloc() function could be used.
 - Add necessary includes to common/linux/vm_priv.h.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I96c57f2763e5ebe18a2f2ee4b33e0e1a2597848c
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1566628
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-18 16:00:37 -07:00
seshendra Gadagottu
bee9c830c7 gpu: nvgpu: allocate syncpoint read map only once
Allocate syncpt_mem only if is not allocated.

JIRA GPUT19X-2

Change-Id: I081d27bb784fbe653890b5f8d36a4295c7ccc19b
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1580731
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-18 14:54:32 -07:00
seshendra Gadagottu
201ccbfa85 gpu: nvgpu: gv11b: update dbg ops
Updated following hal functions for gv11b and reused
them for gv100:
perfbuffer_enable
perfbuffer_disable

These changes are needed because of following reasons:
1. Register offsets for perf_pmasys_* are changed
   for gv11b/gv100 from gk20a.
2. Updated memory type for perf_pmasys_mem_block_target
   to sys_ncoh_f().

Bug 200327596

Change-Id: Ia672ac561917c8ed36caea9cc7e74b7fc7ce8188
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571074
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-18 11:26:10 -07:00
Terje Bergstrom
e039dcbc9d gpu: nvgpu: Use nvgpu_rwsem as TSG channel lock
Use abstract nvgpu_rwsem as TSG channel list lock instead of the Linux
specific rw_semaphore.

JIRA NVGPU-259

Change-Id: I41a38b29d4651838b1962d69f102af1384e12cb6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579935
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-17 14:05:19 -07:00
Terje Bergstrom
3fc7c5f75e gpu: nvgpu: gv11b: Use nvgpu_rwsem as TSG channel lock
Use abstract nvgpu_rwsem as TSG channel list lock instead of the Linux
specific rw_semaphore.

JIRA NVGPU-259

Change-Id: I5f6c918464315e3d140bea0c61a619c3712619c1
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579934
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-10-17 14:05:13 -07:00
Debarshi Dutta
8f55976d49 gpu: nvgpu: cleanup of dbg_gpu_gk20a
This change contains a generic cleanup of linux dependent parts of the
dbg_gpu_gk20a.* files. The following changes have been made

1) Moving methods into ioctl_dbg.* inside common/linux/
2) The structures dbg_session_gk20a and dbg_session_channel_data have
been split into two parts. struct device *dev is removed from
struct dbg_session_gk20a and instead packed into struct
dbg_session_gk20a_linux alongwith dbg_session_gk20a and is moved into
ioctl_dbg. dbg_session_gk20a is now rid of any linux dependencies and
remains in dbg_gpu_gk20a. Similarly, struct file is removed from
struct dbg_session_channel_data and is now packed into struct
dbg_session_channel_data_linux alongwith dbg_session_channel_data and
is moved into ioctl_dbg. struct dbg_session_channel_data is now rid of
linux dependencies and remains in dbg_gpu_gk20a.
3) A callback function is added in order to release the
dbg_session_channel_data.

JIRA NVGPU-205

Change-Id: I853da6dfbf9a96b7cd210beb77f2304445ff7ea6
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575191
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-17 12:55:22 -07:00
Terje Bergstrom
b252653ac5 gpu: nvgpu: Move rest of CDE structures to Linux
Move rest of CDE structures to common/linux. This includes moving
the per-chip firmware file interpretation functions, and removing CDE
ops from HAL and adding it to nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I59d8f44bddadecef81ad3c455b363a14034c5e13
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570403
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-17 10:43:39 -07:00
Terje Bergstrom
5c5b52dce5 gpu: nvgpu: Use internal nvgpu_warpstate
Replace use of ioctl structure warpstate with internal
nvgpu_warptate.

JIRA NVGPU-259

Change-Id: I5170364d0443235cee471b87fa332fc09588f5d3
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578684
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-17 09:25:23 -07:00
Terje Bergstrom
99cae3dff7 gpu: nvgpu: gv11b: Use internal nvgpu_warpstate
Replace use of ioctl structure warpstate with internal
nvgpu_warptate.

JIRA NVGPU-259

Change-Id: I003c15152042e566124c04d6124e515e36157c88
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578683
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-17 09:25:17 -07:00
Shashank Singh
682abd7b5c nvgpu: fix multiple build issues for QNX
- timers and bug header files should be
  included directly. Linux maybe getting
  it via indirect includes. Also, QNX
  requires non-static function to be
  declared explicitly.

Change-Id: I2458654f535d8079347e4a0be744530f56388238
Signed-off-by: Shashank Singh <shashsingh@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577527
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
Tested-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-17 04:28:29 -07:00
Sourab Gupta
47fe66a461 gpu: nvgpu: compile nvgpu allocator for QNX
The patch has the changes for compilation of
common nvgpu allocator for QNX.
This includes some cross-OS compilation changes
and removing some Linux'isms from the allocator.

Change-Id: Ib1ecceec77b497513a196597bff4441615577548
Signed-off-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540306
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
2017-10-17 04:28:25 -07:00
David Nieto
e78cd6c42a gpu: nvgpu: add missing hal defines
Due to lack of GVS coverage some defines were left out in GV100, this change
adds them back

JIRA: NVGPUGV100-9

Change-Id: I2f5778529dcad535bb56c33c38c097415dbf11e5
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577998
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Nirav Patel <nipatel@nvidia.com>
2017-10-16 23:34:04 -07:00
Terje Bergstrom
2269a8675c gpu: nvgpu: Call t19x specific dGPU initialization
Change-Id: I888a03199f25a7f55a8ddd099c1980f8170a9a4a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579122
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-16 13:35:18 -07:00
Terje Bergstrom
0c40a3e034 gpu: nvgpu: Initialize usermode regs for Volta dGPU
Initialize usermode registers also for Volta GPU behind PCIe.

Change-Id: Id621a74838839e4d98dfd0828c1ea5a0d54baa2d
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1579121
Reviewed-by: David Martinez Nieto <dmartineznie@nvidia.com>
Tested-by: David Martinez Nieto <dmartineznie@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
2017-10-16 13:35:12 -07:00
Mahantesh Kumbar
0b6eb9fd80 gpu: nvgpu: Allocate memory for dGPU platform
- Allocate memory for platform data for
each dgpu device detected on PCIe,
- Copy detected device static data to allocated
platform data
- Free allocated space in nvgpu_pci_remove()

Issue: Static platform data is overwritten When two
same SKU/device-id dGPU connected on single platform which
cause accessing wrong dGPU space,
Fix: Fixing issue by allocating space dynamically for each
dGPU device detected & copy data from detected dGPU static
data.

JIRA NVGPUGV100-18

Change-Id: Idf2d2d6d2016b831c21b9da6f8ee38b34304bd12
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577913
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-16 13:35:05 -07:00
Debarshi Dutta
61b263d832 gpu: nvgpu: replace wait_queue_head_t with nvgpu_cond
Replace existing usages of wait_queue_head_t with struct nvgpu_cond and
using the corresponding APIs in order to reduce Linux dependencies in NVGPU.

JIRA NVGPU-205

Change-Id: I85850369c3c47d3e1704e4171b1d172361842423
Signed-off-by: Debarshi Dutta <ddutta@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1575778
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-16 13:35:04 -07:00
Terje Bergstrom
30b9cbe35a gpu: nvgpu: Remove bios_blob debugfs
linux/debugfs.h was included in gk20a.h because of the debugfs entry
bios_blob, which can be used for checking contents of VBIOS. That
has never been used, so instead of abstracting it, this patch removes
the feature altogether.

Two files were using debugfs but did not #include <linux/debugfs.h>.
They failed to build now that gk20a.h no longer #includes it, so
added explit #include.

JIRA NVGPU-259

Change-Id: Ie1ea9be1a8920441b1616f34e64e505e6e10e38c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570404
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-16 13:34:56 -07:00
Terje Bergstrom
7685f60d9d gpu: nvgpu: Abstract rw_semaphore implementation
Abstract implementation of rw_semaphore. In Linux it's implemented
in terms of rw_semaphore. Change deterministic_busy to use the new
implementation.

JIRA NVGPU-259

Change-Id: Ia9c1b6e397581bff7711c5ab6fb76ef6d23cff87
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1570405
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-14 14:13:18 -07:00
Terje Bergstrom
c7e0c7e7ce gpu: nvgpu: Move time correlation arg check to Linux
Move code checking the time correlation IOCTL arguments to Linux
IOCTL code.

JIRA NVGPU-259

Change-Id: Id3ef6839ee96844104d87e943b6940b952261796
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1578700
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-14 07:52:25 -07:00
Deepak Nibade
6bf323f389 gpu: nvgpu: remove use of multichar constants
In gk20a.h, we use these multichar constants
'DONE', '0R32', '0W32'

But these constants fail compilation on some cross-os compilers
Hence remove them by creating a specific MULTICHAR_TAG()

All the User space components also form these constants in similar
fashion

Jira NVGPU-259

Change-Id: Ibe83617a8d15b657e450fdd59dbc171b3d822842
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576933
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 17:24:06 -07:00
Deepak Nibade
e86e19c4fb gpu: nvgpu: forward declare gk20a_debug_output in gr_gp10b.h
Forward declare struct gk20a_debug_output in gr_gp10b.h since we do not
explicitly include any header file for same

Jira NVGPU-259

Change-Id: I9a4048591363e2ddbe7e8b3c2e56ab1e4eae0b3a
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576931
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-10-13 17:00:46 -07:00
Deepak Nibade
1a5c21ccf5 gpu: nvgpu: include nvgpu/types in pramin.h
In include/nvgpu/pramin.h, we right include linux specific header
linux/types.h.
But since this is a common header, we should include nvgpu/types.h
which is generic and linux independent

Jira NVGPU-259

Change-Id: I0acff92b3de9431e615faa6de26306cccd5ca443
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576930
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-10-13 17:00:45 -07:00
Deepak Nibade
50b2c45aa5 gpu: nvgpu: protect stack_trace with config
We use struct stack_trace in struct channel_gk20a_ref_action
But since channel_gk20a_ref_action is needed only if
GK20A_CHANNEL_REFCOUNT_TRACKING is set, protect it with that config

Jira NVGPU-259

Change-Id: I6b2d6f470bf924bb1ddfd31ba9968b56c63c2372
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576929
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
2017-10-13 17:00:45 -07:00
Alex Waterman
2ecd18902e gpu: nvgpu: Use config in makefile for debug_kmem.c
Conditionally compile debug_kmem.c in the Makefile since the entire
file is not needed when CONFIG_NVGPU_TRACK_KMEM_USAGE is not enabled.
Removing as many conditional compilation flags from the C code itself
is highly desirable from a code complexity standard.

Change-Id: If1e87986ca1ee6d71485f1ab40f10c1645c1a628
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1576543
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:24 -07:00
Peter Daifuku
4b8dc71de5 gpu: nvgpu: vgpu: flatten out t19x vgpu hal
Instead of calling the native HAL init function then adding
multiple layers of modification for VGPU, flatten out the sequence
so that all entry points are set statically and visible in a
single file.

JIRA ESRM-30

Change-Id: I8d277aaccb0e63b2d504e7aba32eb31ef82f4ec0
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574619
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:20:19 -07:00
Peter Daifuku
57fb527a7e gpu: nvgpu: vgpu: flatten out vgpu hal
Instead of calling the native HAL init function then adding
multiple layers of modification for VGPU, flatten out the sequence
so that all entry points are set statically and visible in a
single file.

JIRA ESRM-30

Change-Id: Ie424abb48bce5038874851d399baac5e4bb7d27c
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1574616
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:18 -07:00
seshendra Gadagottu
7612e41215 gpu: nvgpu: gvxx: add hw defines for pbdma info
Generated following hw definitions to dump relevant data:
    pbdma_gp_shadow_0_r
    pbdma_gp_shadow_1_r

Bug 2003671

Change-Id: If2d0557b3c2896747793ff2afad875206e25c6d8
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572183
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:12 -07:00
seshendra Gadagottu
3d343c9eea gpu: nvgpu: enhance pbdma debug info
Enhanced pbdma error output to print pbdma interrupt
error.

Generated following hw definitions to dump relevant data:
pbdma_gp_shadow_0_r
pbdma_gp_shadow_1_r

Updated gk20a_dump_pbdma_status to dump this additional
info:
pbdma_gp_put_r
pbdma_gp_get_r
pbdma_gp_shadow_0_r
pbdma_gp_shadow_1_r

Bug 2003671

Change-Id: Iaa75d936e00470a2b8d1151f60dbeb741b3f9bce
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1572182
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:07 -07:00
Terje Bergstrom
b0092ea95c gpu: nvgpu: gv11b: Abstract IO aperture accessors
Implement T19x specific usermode aperture initialization functions.
Move usermode_regs field to nvgpu_os_linux_t19x, because it is
Linux specific.

JIRA NVGPU-259

Change-Id: I9d6ce243a692ab48209d468288ed85f89fb26770
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569699
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:20:01 -07:00
Terje Bergstrom
be3750bc9e gpu: nvgpu: Abstract IO aperture accessors
Add abstraction of IO aperture accessors. Add new functions
gk20a_io_exists() and gk20a_io_valid_reg() to remove dependencies to
aperture fields from common code.

Implement Linux version of the abstraction by moving gk20a_readl()
and gk20a_writel() to new Linux specific io.c. Move the fields
defining IO aperture to nvgpu_os_linux.

Add t19x specific IO aperture initialization functions and add t19x
specific section to nvgpu_os_linux.

JIRA NVGPU-259

Change-Id: I09e79cda60d11a20d1099a9aaa6d2375236e94ce
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1569698
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:55 -07:00
Alex Waterman
ff9c3fc20a gpu: nvgpu: Reduce usage of nvgpu_vidmem_get_page_alloc
Reduce the usage of nvgpu_vidmem_get_page_alloc() and friends as much
as possible. This reduces the dependency of nvgpu on Linux SGLs. SGLs
still need to be used, however, since sharing buffers in userspace is
done by dma_buf FD. The best way to pass the vidmem buf through the
dma_buf is by SGL pointer.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: Ide0e9e5a557f00aa63b063be085042101a5b34ee
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540709
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:34 -07:00
Alex Waterman
59e4089278 gpu: nvgpu: Separate vidmem alloc from Linux code
Split the core vidmem allocation from the Linux component of vidmem
allocation. The core vidmem allocation allocates the nvgpu_mem struct
that defines the vidmem buffer in the core MM code. The Linux code
now allocates some Linux specific stuff (dma_buf, etc) and also
allocates the core vidmem buf.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I88e87e0abd5ec714610eacc6eac17e148bcee3ce
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540708
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:28 -07:00
Alex Waterman
88d5f6b415 gpu: nvgpu: Rename vidmem APIs
Rename the VIDMEM APIs to be prefixed by nvgpu_ to ensure
consistency and that all the non-static vidmem functions are
properly namespaced.

JIRA NVGPU-30
JIRA NVGPU-138

Change-Id: I9986ee8f2c8f95a4b7c5e2b9607bc1e77933ccfc
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1540707
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:23 -07:00
seshendra Gadagottu
506f891f76 gpu: nvgpu: gv11b: add syncpt shim ro map
For sync-point read map, create read only map per vm
and share with all channels that are using same vm.

Now restrict rw map to single syncpoint shim memory range.

JIRA GPUT19X-2

Change-Id: Ibd0b82d1cdb8861e1dbb073b27da1f9c9ab1d2ab
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514339
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:19:17 -07:00
seshendra Gadagottu
a9ce91f910 gpu: nvgpu: add syncpoint read map
For sync-point read map:
 1. Added nvgpu_mem memory allocator in gk20a struct and
    allocated memory for this in gk20a_finalize_poweron()
    and freed this memory in gk20a_remove().
 2. Added "u64 syncpt_ro_map_gpu_va" in vm_gk20a struct
    for read map in vm.

Added nvgpu_quiesce() in nvgpu_remove() before freeing
syncpoint read map to ensure that nvgpu is idle.

JIRA GPUT19X-2

Change-Id: I7cbfec57f0992682dd833a1b0d92d694bcaf1eb3
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1514338
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 15:19:16 -07:00
seshendra Gadagottu
017a9f5775 gpu: nvgpu: add API to create nvgpu_mem from phys
Added new memory API _nvgpu_mem_create_from_phys for
creating nvgpu_mem from physical memory aperture.
With this new API, avoided usage of linux specific
"struct page" in general code and moved this code to
common linux code. This API internally uses
__nvgpu_mem_create_from_pages for creating nvgpu_mem
from physical pages.

JIRA GPUT19X-2

Change-Id: Iaf0193a7c33e71422e4ddabde01edf46f5a81794
Signed-off-by: seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1571073
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2017-10-13 15:19:11 -07:00
Seema Khowala
ceaab0595c gpu: nvgpu: ctxsw_trace_tsg/channel_reset call order
For non fake mmu fault, both tsg and ch pointers
could be valid. If tsg pointer is non null, issue
ctxsw_trace for tsg instead of channel only.

Change-Id: I161c40e8d43c7ae4d953ef4768ad75d4e993c87e
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577915
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 13:43:22 -07:00
Seema Khowala
a8643b3a99 gpu: nvgpu: WAR: unbind_channel_verify_status ret val
Do not return error if channel to be removed has
NEXT set. This is a WAR until proper fix is
identified and implemented.

Bug 200327095

Change-Id: Ia77f3b834e8e577ac2dad8281f1dd562079adcef
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1577133
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2017-10-13 13:43:10 -07:00