Seema Khowala
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f66f3e1341
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gpu: nvgpu: move fifo intr to hal/fifo
Removed intr_0_error_mask ops
Added below ops for fifo intr
intr_0_enable
intr_1_enable
intr_0_isr
intr_1_isr
JIRA NVGPU-1310
Change-Id: I19bd1a380a89cffd582d6c4a0b7796a46fec5afb
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2072144
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
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2019-03-25 11:03:39 -07:00 |
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