Commit Graph

9 Commits

Author SHA1 Message Date
Philip Elcan
fea84c09fa gpu: nvgpu: clk: fix MISRA 10.3 issues for size_t
MISRA Rule 10.3 prohibits implicit casting of objects to a different
type. This change addresses a number of MISRA 10.3 violations in
clk_prog.c where size_t values were being implicitly cast to u16.

JIRA NVGPU-1008

Change-Id: I39a257a056faf0f903363ed8d697efa88d74e75e
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001226
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-23 13:55:19 -08:00
Philip Elcan
76acbc02bc gpu: nvgpu: clk: fix return type for vflookup()
This changes the return type for the API fvlookup() from a u32 to an
int. The implementation of the API in vflookup_prob_1x_master() was
already trying to return negative values. This allows users of the API
to properly check the return value.

JIRA NVGPU-1008

Change-Id: Ifb12b5ffbde7fed501e7dfec9bd6a28dcc1b242e
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001225
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-23 13:55:15 -08:00
Philip Elcan
99ed40b7fb gpu: nvgpu: clk: fix MISRA 10.3 issues for size_t
MISRA Rule 10.3 prohibits implicit casting of objects to a different
type. This change addresses a number of MISRA 10.3 violations in
clk_domain.c where size_t values were being implicitly cast to u16.

JIRA NVGPU-1008

Change-Id: If2dc6c6a288fe4b16425a210bc6d76bbef2ce019
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001224
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-23 13:55:12 -08:00
Philip Elcan
2cff6844fb gpu: nvgpu: clk: use explicit BIT32 macro
Use the BIT32() macro to create 32 bit values when assigning to a u32.
This avoids MISRA 10.3 violations for assigning different types to a
u32.

JIRA NVGPU-1008

Change-Id: I0b50c3cf476737d38c943ecc12c4f17f9ba9ddb8
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001223
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-23 13:55:08 -08:00
Philip Elcan
968db82a65 gpu: nvgpu: clk: fix incorrect casts in returns
Remove the u32 casting for return values in functions whose return type
is int.

JIRA NVGPU-1008

Change-Id: I87d4e3a4f8530f45b59a1f612180b295c5238b28
Signed-off-by: Philip Elcan <pelcan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2001222
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-23 13:55:04 -08:00
rmylavarapu
f048bb5a71 gpu: nvgpu: Reading Vmin and Volt_rail get status
Changes:
1) volt_rail_boardobj_grp_get_status function implemented.
2) nvgpu_volt_get_vmin_tu10x function implemented.
3) Only Vmin is updated into boardobjs.

Bug 200454682
Bug 2481917

Change-Id: Ie070b28a78503eeb3003493b5f130a4dcd9b1275
Signed-off-by: rmylavarapu <rmylavarapu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1996137
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-17 09:15:22 -08:00
Abdul Salam
c57cf00aa0 gpu: nvgpu: Add quantization to slave VF Points
All slave clock should be quantized as per step size.
TU104 has 15Mhz as step size.
Enable clk_arb without enabling clk_freq_controller.
clk_freq_controller is not needed for Auto use case.
Increase the maxclk only when master is less that slave clock.
This is needed when gpcclk is less than slave P0 min.
Use get_status to get Vim and use it for change sequencer.
Add support for Device Events

Bug 200454682
Bug 2481917

Change-Id: Ie0c404f4b77e41f6a1719b52d6e29a5ac757b41b
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1994831
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-17 09:15:19 -08:00
Scott Long
0837b6988c gpu: nvgpu: container_of() changes to clk arb code
The container_of() macro used in nvgpu produces the following
set of MISRA required rule violations:

 * Rule 11.3 : A cast shall not be performed between a pointer to
               object type and a pointer to a different object type.
 * Rule 11.8 : A cast shall not remove any const or volatile
               qualification from the type pointed to be a pointer.
 * Rule 20.7 : Expressions resulting from the expansion of macro
               parameters shall be enclosed in parentheses.

Using the same modified implementation of container_of() as that
used in the nvgpu_list_node/nvgpu_rbtree_node routines eliminates
the Rule 11.8 and Rule 20.7 violations and exchanges the Rule 11.3
violation with an advisory Rule 11.4 violation.

This patch uses that same equivalent implementation in two new
(static) functions that are used to replace references to
container_of() references in clk arb code:

 * nvgpu_clk_dev_from_refcount
 * nvgpu_clk_session_from_refcount

It should be noted that replacement functions still contain
potentially dangerous (and non-MISRA compliant code) and that it is
expected that deviation requests will be filed for the new advisory
rule violations accordingly.

JIRA NVGPU-782

Change-Id: I612990e9c27f10d0ce3ac76729529aa1eb15d42a
Signed-off-by: Scott Long <scottl@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1993796
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-14 20:34:26 -08:00
Terje Bergstrom
dce78f7332 gpu: nvgpu: Move PMU code to common/pmu
Move code interfacing with PMU tasks to common/pmu.

JIRA NVGPU-961

Change-Id: Ie62611b0ffe1196d4bfdc740e03017e1894a834f
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1950991
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2019-01-10 20:09:55 -08:00