For ASIL-D decomposision we need hw register checker to validate
potential register configurations done at init phase

This is the tool used to generate hw registers table that needs to be
validated on the target.

* HW Register Table generator and instructions
  cd $TEGRA_TOP/kernel/nvgpu/scripts/checker/hw_register_generator
  make
  make generate

* Generated hw table is located at
  $TEGRA_TOP/qnx/src/resmgrs/nvrm/nvgpu_rmos/checker/hw_registers_table.c