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76 lines
2.2 KiB
C
76 lines
2.2 KiB
C
/*
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* general perf structures & definitions
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*
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* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_PERF_VFE_EQU_H
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#define NVGPU_PERF_VFE_EQU_H
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#include "ucode_perf_vfe_inf.h"
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struct vfe_equs {
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struct boardobjgrp_e255 super;
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};
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struct vfe_equ {
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struct pmu_board_obj super;
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u8 var_idx;
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u8 equ_idx_next;
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u8 output_type;
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u32 out_range_min;
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u32 out_range_max;
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struct boardobjgrpmask_e32 mask_depending_vars;
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int (*mask_depending_build)(struct gk20a *g,
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struct boardobjgrp *pboardobjgrp,
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struct vfe_equ *pvfe_equ);
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bool b_is_dynamic_valid;
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bool b_is_dynamic;
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};
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struct vfe_equ_compare {
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struct vfe_equ super;
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u8 func_id;
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u8 equ_idx_true;
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u8 equ_idx_false;
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u32 criteria;
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};
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struct vfe_equ_minmax {
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struct vfe_equ super;
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bool b_max;
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u8 equ_idx0;
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u8 equ_idx1;
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};
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struct vfe_equ_quadratic {
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struct vfe_equ super;
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u32 coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT];
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};
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struct vfe_equ_scalar {
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struct vfe_equ super;
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u8 equ_idx_to_scale;
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};
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int perf_vfe_equ_sw_setup(struct gk20a *g);
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int perf_vfe_equ_pmu_setup(struct gk20a *g);
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#endif /* NVGPU_PERF_VFE_EQU_H */
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