mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
362 lines
8.4 KiB
C
362 lines
8.4 KiB
C
/*
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* Copyright (c) 2012-2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* Function naming determines intended use:
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*
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* <x>_r(void) : Returns the offset for register <x>.
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*
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* <x>_o(void) : Returns the offset for element <x>.
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*
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* <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
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*
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* <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
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*
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* <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
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* and masked to place it at field <y> of register <x>. This value
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* can be |'d with others to produce a full register value for
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* register <x>.
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*
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* <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
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* value can be ~'d and then &'d to clear the value of field <y> for
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* register <x>.
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*
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* <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
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* to place it at field <y> of register <x>. This value can be |'d
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* with others to produce a full register value for <x>.
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*
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* <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
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* <x> value 'r' after being shifted to place its LSB at bit 0.
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* This value is suitable for direct comparison with other unshifted
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* values appropriate for use in field <y> of register <x>.
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*
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* <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
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* field <y> of register <x>. This value is suitable for direct
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* comparison with unshifted values appropriate for use in field <y>
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* of register <x>.
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*/
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#ifndef _hw_therm_gk20a_h_
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#define _hw_therm_gk20a_h_
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static inline u32 therm_use_a_r(void)
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{
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return 0x00020798;
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}
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static inline u32 therm_use_a_ext_therm_0_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_use_a_ext_therm_1_enable_f(void)
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{
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return 0x2;
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}
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static inline u32 therm_use_a_ext_therm_2_enable_f(void)
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{
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return 0x4;
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}
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static inline u32 therm_evt_ext_therm_0_r(void)
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{
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return 0x00020700;
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_0_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_0_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_evt_ext_therm_1_r(void)
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{
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return 0x00020704;
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_1_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_1_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_evt_ext_therm_2_r(void)
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{
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return 0x00020708;
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}
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static inline u32 therm_evt_ext_therm_2_slow_factor_f(u32 v)
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{
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return (v & 0x3f) << 8;
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}
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static inline u32 therm_evt_ext_therm_2_slow_factor_init_v(void)
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{
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return 0x00000000;
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}
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static inline u32 therm_evt_ext_therm_2_priority_f(u32 v)
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{
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return (v & 0x1f) << 24;
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}
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static inline u32 therm_weight_1_r(void)
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{
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return 0x00020024;
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}
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static inline u32 therm_config1_r(void)
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{
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return 0x00020050;
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}
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static inline u32 therm_config2_r(void)
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{
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return 0x00020130;
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}
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static inline u32 therm_config2_slowdown_factor_extended_f(u32 v)
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{
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return (v & 0x1) << 24;
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}
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static inline u32 therm_config2_grad_enable_f(u32 v)
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{
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return (v & 0x1) << 31;
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}
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static inline u32 therm_gate_ctrl_r(u32 i)
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{
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return 0x00020200 + i*4;
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}
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static inline u32 therm_gate_ctrl_eng_clk_m(void)
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{
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return 0x3 << 0;
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}
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static inline u32 therm_gate_ctrl_eng_clk_run_f(void)
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{
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return 0x0;
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}
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static inline u32 therm_gate_ctrl_eng_clk_auto_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_gate_ctrl_eng_clk_stop_f(void)
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{
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return 0x2;
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}
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static inline u32 therm_gate_ctrl_blk_clk_m(void)
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{
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return 0x3 << 2;
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}
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static inline u32 therm_gate_ctrl_blk_clk_run_f(void)
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{
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return 0x0;
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}
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static inline u32 therm_gate_ctrl_blk_clk_auto_f(void)
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{
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return 0x4;
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}
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static inline u32 therm_gate_ctrl_eng_pwr_m(void)
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{
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return 0x3 << 4;
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}
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static inline u32 therm_gate_ctrl_eng_pwr_auto_f(void)
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{
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return 0x10;
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}
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static inline u32 therm_gate_ctrl_eng_pwr_off_v(void)
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{
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return 0x00000002;
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}
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static inline u32 therm_gate_ctrl_eng_pwr_off_f(void)
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{
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return 0x20;
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}
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static inline u32 therm_gate_ctrl_eng_idle_filt_exp_f(u32 v)
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{
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return (v & 0x1f) << 8;
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}
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static inline u32 therm_gate_ctrl_eng_idle_filt_exp_m(void)
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{
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return 0x1f << 8;
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}
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static inline u32 therm_gate_ctrl_eng_idle_filt_mant_f(u32 v)
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{
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return (v & 0x7) << 13;
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}
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static inline u32 therm_gate_ctrl_eng_idle_filt_mant_m(void)
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{
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return 0x7 << 13;
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}
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static inline u32 therm_gate_ctrl_eng_delay_before_f(u32 v)
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{
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return (v & 0xf) << 16;
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}
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static inline u32 therm_gate_ctrl_eng_delay_before_m(void)
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{
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return 0xf << 16;
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}
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static inline u32 therm_gate_ctrl_eng_delay_after_f(u32 v)
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{
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return (v & 0xf) << 20;
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}
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static inline u32 therm_gate_ctrl_eng_delay_after_m(void)
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{
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return 0xf << 20;
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}
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static inline u32 therm_fecs_idle_filter_r(void)
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{
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return 0x00020288;
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}
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static inline u32 therm_fecs_idle_filter_value_m(void)
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{
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return 0xffffffff << 0;
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}
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static inline u32 therm_hubmmu_idle_filter_r(void)
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{
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return 0x0002028c;
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}
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static inline u32 therm_hubmmu_idle_filter_value_m(void)
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{
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return 0xffffffff << 0;
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}
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static inline u32 therm_clk_slowdown_r(u32 i)
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{
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return 0x00020160 + i*4;
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}
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static inline u32 therm_clk_slowdown_idle_factor_f(u32 v)
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{
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return (v & 0x3f) << 16;
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}
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static inline u32 therm_clk_slowdown_idle_factor_m(void)
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{
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return 0x3f << 16;
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}
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static inline u32 therm_clk_slowdown_idle_factor_v(u32 r)
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{
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return (r >> 16) & 0x3f;
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}
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static inline u32 therm_clk_slowdown_idle_factor_disabled_f(void)
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{
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return 0x0;
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}
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static inline u32 therm_grad_stepping_table_r(u32 i)
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{
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return 0x000202c8 + i*4;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_f(u32 v)
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{
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return (v & 0x3f) << 0;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_m(void)
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{
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return 0x3f << 0;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by1p5_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by2_f(void)
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{
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return 0x2;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by4_f(void)
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{
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return 0x6;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor0_fpdiv_by8_f(void)
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{
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return 0xe;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor1_f(u32 v)
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{
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return (v & 0x3f) << 6;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor1_m(void)
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{
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return 0x3f << 6;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor2_f(u32 v)
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{
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return (v & 0x3f) << 12;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor2_m(void)
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{
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return 0x3f << 12;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor3_f(u32 v)
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{
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return (v & 0x3f) << 18;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor3_m(void)
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{
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return 0x3f << 18;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor4_f(u32 v)
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{
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return (v & 0x3f) << 24;
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}
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static inline u32 therm_grad_stepping_table_slowdown_factor4_m(void)
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{
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return 0x3f << 24;
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}
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static inline u32 therm_grad_stepping0_r(void)
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{
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return 0x000202c0;
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}
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static inline u32 therm_grad_stepping0_feature_s(void)
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{
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return 1;
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}
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static inline u32 therm_grad_stepping0_feature_f(u32 v)
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{
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return (v & 0x1) << 0;
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}
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static inline u32 therm_grad_stepping0_feature_m(void)
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{
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return 0x1 << 0;
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}
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static inline u32 therm_grad_stepping0_feature_v(u32 r)
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{
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return (r >> 0) & 0x1;
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}
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static inline u32 therm_grad_stepping0_feature_enable_f(void)
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{
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return 0x1;
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}
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static inline u32 therm_grad_stepping1_r(void)
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{
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return 0x000202c4;
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}
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static inline u32 therm_grad_stepping1_pdiv_duration_f(u32 v)
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{
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return (v & 0x1ffff) << 0;
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}
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static inline u32 therm_clk_timing_r(u32 i)
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{
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return 0x000203c0 + i*4;
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}
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static inline u32 therm_clk_timing_grad_slowdown_f(u32 v)
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{
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return (v & 0x1) << 16;
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}
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static inline u32 therm_clk_timing_grad_slowdown_m(void)
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{
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return 0x1 << 16;
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}
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static inline u32 therm_clk_timing_grad_slowdown_enabled_f(void)
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{
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return 0x10000;
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}
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#endif
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