mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
109 lines
2.9 KiB
C
109 lines
2.9 KiB
C
/*
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* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/kmem.h>
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#include <nvgpu/gk20a.h>
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#include "boardobj.h"
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/*
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* Destructor for the base board object. Called by each device-Specific
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* implementation of the BOARDOBJ interface to destroy the board object.
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* This has to be explicitly set by each device that extends from the
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* board object.
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*/
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static int destruct_super(struct pmu_board_obj *obj)
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{
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if (obj == NULL) {
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return -EINVAL;
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}
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nvgpu_list_del(&obj->node);
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if (obj->allocated) {
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nvgpu_kfree(obj->g, obj);
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}
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return 0;
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}
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/*
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* check whether the specified BOARDOBJ object implements the queried
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* type/class enumeration.
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*/
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static bool implements_super(struct gk20a *g, struct pmu_board_obj *obj,
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u8 type)
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{
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nvgpu_log_info(g, " ");
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return (0U != (obj->type_mask & BIT32(type)));
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}
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int pmu_board_obj_pmu_data_init_super(struct gk20a *g,
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struct pmu_board_obj *obj, struct nv_pmu_boardobj *pmu_obj)
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{
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nvgpu_log_info(g, " ");
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if (obj == NULL) {
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return -EINVAL;
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}
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if (pmu_obj == NULL) {
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return -EINVAL;
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}
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pmu_obj->type = obj->type;
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nvgpu_log_info(g, " Done");
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return 0;
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}
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int pmu_board_obj_construct_super(struct gk20a *g,
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struct pmu_board_obj *obj, void *args)
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{
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struct pmu_board_obj *obj_tmp = (struct pmu_board_obj *)args;
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nvgpu_log_info(g, " ");
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if ((obj_tmp == NULL) || (obj == NULL)) {
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return -EINVAL;
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}
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obj->allocated = true;
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obj->g = g;
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obj->type = obj_tmp->type;
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obj->idx = CTRL_BOARDOBJ_IDX_INVALID;
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obj->type_mask =
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BIT32(obj->type) | obj_tmp->type_mask;
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obj->implements = implements_super;
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obj->destruct = destruct_super;
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obj->pmudatainit = pmu_board_obj_pmu_data_init_super;
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nvgpu_list_add(&obj->node, &g->boardobj_head);
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return 0;
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}
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u8 pmu_board_obj_get_type(void *obj)
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{
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return (((struct pmu_board_obj *)(obj))->type);
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}
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u8 pmu_board_obj_get_idx(void *obj)
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{
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return (((struct pmu_board_obj *)(obj))->idx);
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}
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