mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 09:12:24 +03:00
76 lines
2.6 KiB
C
76 lines
2.6 KiB
C
/*
|
|
* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
* DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
#include <nvgpu/gk20a.h>
|
|
#include <nvgpu/gmmu.h>
|
|
#include <nvgpu/mm.h>
|
|
|
|
#include "mm_gv11b.h"
|
|
|
|
void gv11b_mm_init_inst_block(struct nvgpu_mem *inst_block,
|
|
struct vm_gk20a *vm, u32 big_page_size)
|
|
{
|
|
struct gk20a *g = gk20a_from_vm(vm);
|
|
u64 pdb_addr = nvgpu_pd_gpu_addr(g, &vm->pdb);
|
|
|
|
nvgpu_log_info(g, "inst block phys = 0x%llx, kv = 0x%p",
|
|
nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va);
|
|
|
|
g->ops.ramin.init_pdb(g, inst_block, pdb_addr, vm->pdb.mem);
|
|
|
|
if ((big_page_size != 0U) && (g->ops.ramin.set_big_page_size != NULL)) {
|
|
g->ops.ramin.set_big_page_size(g, inst_block, big_page_size);
|
|
}
|
|
|
|
if (g->ops.ramin.init_subctx_pdb != NULL) {
|
|
g->ops.ramin.init_subctx_pdb(g, inst_block, vm->pdb.mem, false,
|
|
1U);
|
|
}
|
|
}
|
|
|
|
void gv11b_mm_init_inst_block_for_subctxs(struct nvgpu_mem *inst_block,
|
|
struct vm_gk20a *vm, u32 big_page_size, u32 max_subctx_count)
|
|
{
|
|
struct gk20a *g = gk20a_from_vm(vm);
|
|
u64 pdb_addr = nvgpu_pd_gpu_addr(g, &vm->pdb);
|
|
|
|
nvgpu_log_info(g, "inst block phys = 0x%llx, kv = 0x%p",
|
|
nvgpu_inst_block_addr(g, inst_block), inst_block->cpu_va);
|
|
|
|
g->ops.ramin.init_pdb(g, inst_block, pdb_addr, vm->pdb.mem);
|
|
|
|
if ((big_page_size != 0U) &&
|
|
(g->ops.ramin.set_big_page_size != NULL)) {
|
|
g->ops.ramin.set_big_page_size(g, inst_block, big_page_size);
|
|
}
|
|
|
|
if (g->ops.ramin.init_subctx_pdb != NULL) {
|
|
g->ops.ramin.init_subctx_pdb(g, inst_block, vm->pdb.mem, false,
|
|
max_subctx_count);
|
|
}
|
|
}
|
|
|
|
bool gv11b_mm_is_bar1_supported(struct gk20a *g)
|
|
{
|
|
return false;
|
|
}
|