mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <unit/module.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/fuse.h>
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#include <nvgpu/posix/io.h>
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#include <nvgpu/posix/soc_fuse.h>
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#include "nvgpu-fifo-gv11b.h"
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/*
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* Mock I/O
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*/
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/*
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* Write callback. Forward the write access to the mock IO framework.
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*/
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static void writel_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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nvgpu_posix_io_writel_reg_space(g, access->addr, access->value);
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}
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/*
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* Read callback. Get the register value from the mock IO framework.
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*/
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static void readl_access_reg_fn(struct gk20a *g,
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struct nvgpu_reg_access *access)
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{
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access->value = nvgpu_posix_io_readl_reg_space(g, access->addr);
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}
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static int tegra_fuse_readl_access_reg_fn(unsigned long offset, u32 *value)
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{
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if (offset == FUSE_GCPLEX_CONFIG_FUSE_0) {
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*value = GCPLEX_CONFIG_WPR_ENABLED_MASK;
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}
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return 0;
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}
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static struct nvgpu_posix_io_callbacks test_reg_callbacks = {
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/* Write APIs all can use the same accessor. */
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.writel = writel_access_reg_fn,
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.writel_check = writel_access_reg_fn,
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.bar1_writel = writel_access_reg_fn,
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.usermode_writel = writel_access_reg_fn,
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/* Likewise for the read APIs. */
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.__readl = readl_access_reg_fn,
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.readl = readl_access_reg_fn,
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.bar1_readl = readl_access_reg_fn,
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.tegra_fuse_readl = tegra_fuse_readl_access_reg_fn,
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};
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int test_fifo_setup_gv11b_reg_space(struct unit_module *m, struct gk20a *g)
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{
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(void)nvgpu_posix_register_io(g, &test_reg_callbacks);
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return 0;
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}
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