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linux-nvgpu/drivers/gpu
Sai Nikhil 007d9dc9d8 gpu: nvgpu: gp10b: bit shift issues in hw headers
MISRA Rule 12.2 states that the right hand operand of a shift operator
shall lie in the range zero to one less than the width in bits of the
essential type of the left hand operand.

The left hand operands in these shift operations are unsigned integer
literals which can be u16 or u32 dependent on the platform.

The maximum value of right hand operand of the shift is 31, so make
the left hand operand a u32 using the U32() Macro.

JIRA NVGPU-1054

Change-Id: I1d71d7e62ce1a6331a4f33740a814bb3aa0309aa
Signed-off-by: Sai Nikhil <snikhil@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1933533
Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2018-11-14 19:55:03 -08:00
..
2017-10-29 11:00:55 -07:00