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Move the remaining GMMU HAL related code from the gm20b/, gp10b/, and gv11b/ directories to new gmmu hal source files. Also update all makefiles and HAL init code to refelct the new location of the headers and source code. JIRA NVGPU-2042 Change-Id: Ic9b85cc547bd0f994ad11042fc4093c517327399 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2103672 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
625 lines
16 KiB
C
625 lines
16 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdio.h>
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#include <unit/unit.h>
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#include <unit/io.h>
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#include <unit/unit-requirement-ids.h>
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#include <nvgpu/posix/types.h>
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#include <os/posix/os_posix.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/nvgpu_sgt.h>
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#include <nvgpu/vm_area.h>
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#include <gp10b/mm_gp10b.h>
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#include <hal/mm/cache/flush_gk20a.h>
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#include <hal/mm/cache/flush_gv11b.h>
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#include <hal/mm/gmmu/gmmu_gp10b.h>
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#include <hal/mm/gmmu/gmmu_gv11b.h>
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#include <hal/fb/fb_gp10b.h>
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#include <hal/fb/fb_gm20b.h>
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#include <nvgpu/hw/gv11b/hw_gmmu_gv11b.h>
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/* Random CPU physical address for the buffers we'll map */
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#define BUF_CPU_PA 0xEFAD80000000ULL
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#define PHYS_ADDR_BITS_HIGH 0x00FFFFFFU
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#define PHYS_ADDR_BITS_LOW 0xFFFFFF00U
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/* Check if address is aligned at the requested boundary */
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#define IS_ALIGNED(addr, align) ((addr & (align - 1U)) == 0U)
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/*
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* Helper function used to create custom SGTs from a list of SGLs.
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* The created SGT needs to be explicitly free'd.
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*/
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static struct nvgpu_sgt *custom_sgt_create(struct unit_module *m,
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struct gk20a *g,
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struct nvgpu_mem *mem,
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struct nvgpu_mem_sgl *sgl_list,
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u32 nr_sgls)
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{
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int ret = 0;
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struct nvgpu_sgt *sgt = NULL;
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if (mem == NULL) {
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unit_err(m, "mem is NULL\n");
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goto fail;
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}
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if (sgl_list == NULL) {
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unit_err(m, "sgl_list is NULL\n");
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goto fail;
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}
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ret = nvgpu_mem_posix_create_from_list(g, mem, sgl_list, nr_sgls);
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if (ret != 0) {
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unit_err(m, "Failed to create mem from sgl list\n");
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goto fail;
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}
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sgt = nvgpu_sgt_create_from_mem(g, mem);
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if (sgt == NULL) {
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goto fail;
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}
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return sgt;
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fail:
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unit_err(m, "Failed to create sgt\n");
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return NULL;
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}
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/*
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* TODO: This function is copied from the gmmu/page table unit test. Instead of
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* duplicating code, share a single implementation of the function.
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*/
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static inline bool pte_is_valid(u32 *pte)
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{
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return ((pte[0] & gmmu_new_pte_valid_true_f()) != 0U);
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}
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/*
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* TODO: This function is copied from the gmmu/page table unit test. Instead of
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* duplicating code, share a single implementation of the function.
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*/
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static u64 pte_get_phys_addr(struct unit_module *m, u32 *pte)
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{
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u64 addr_bits;
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if (pte == NULL) {
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unit_err(m, "pte is NULL\n");
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unit_err(m, "Failed to get phys addr\n");
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return 0;
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}
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addr_bits = ((u64)(pte[1] & PHYS_ADDR_BITS_HIGH)) << 32;
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addr_bits |= (u64)(pte[0] & PHYS_ADDR_BITS_LOW);
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addr_bits >>= 8;
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return (addr_bits << gmmu_new_pde_address_shift_v());
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}
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/* Initialize test environment */
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static int init_test_env(struct unit_module *m, struct gk20a *g)
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{
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struct nvgpu_os_posix *p = nvgpu_os_posix_from_gk20a(g);
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if (p == NULL) {
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unit_err(m, "posix is NULL\n");
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unit_err(m, "Failed to initialize test environment\n");
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return UNIT_FAIL;
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}
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p->mm_is_iommuable = true;
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nvgpu_set_enabled(g, NVGPU_MM_UNIFIED_MEMORY, true);
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nvgpu_set_enabled(g, NVGPU_HAS_SYNCPOINTS, true);
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g->ops.fb.compression_page_size = gp10b_fb_compression_page_size;
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g->ops.fb.tlb_invalidate = gm20b_fb_tlb_invalidate;
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g->ops.mm.gmmu.get_default_big_page_size =
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gp10b_mm_get_default_big_page_size;
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g->ops.mm.gmmu.get_mmu_levels = gp10b_mm_get_mmu_levels;
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g->ops.mm.gmmu.map = nvgpu_gmmu_map_locked;
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g->ops.mm.gmmu.unmap = nvgpu_gmmu_unmap_locked;
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g->ops.mm.gmmu.gpu_phys_addr = gv11b_gpu_phys_addr;
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g->ops.mm.cache.l2_flush = gv11b_mm_l2_flush;
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g->ops.mm.cache.fb_flush = gk20a_mm_fb_flush;
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return UNIT_SUCCESS;
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}
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/*
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* Try mapping a buffer into the GPU virtual address space:
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* - Allocate a new CPU buffer
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* - If a specific GPU VA was requested, allocate a VM area for a fixed GPU
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* VA mapping
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* - Map buffer into the GPU virtual address space
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* - Verify that the buffer was mapped correctly
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* - Unmap buffer
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*/
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static int map_buffer(struct unit_module *m,
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struct gk20a *g,
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struct vm_gk20a *vm,
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u64 cpu_pa,
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u64 gpu_va,
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size_t buf_size,
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size_t page_size,
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size_t alignment)
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{
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int ret = UNIT_SUCCESS;
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struct nvgpu_mapped_buf *mapped_buf = NULL;
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struct nvgpu_mapped_buf *mapped_buf_check = NULL;
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struct nvgpu_os_buffer os_buf = {0};
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struct nvgpu_mem_sgl sgl_list[1];
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struct nvgpu_mem mem = {0};
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struct nvgpu_sgt *sgt = NULL;
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bool fixed_gpu_va = (gpu_va != 0);
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u32 pte[2];
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if (vm == NULL) {
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unit_err(m, "vm is NULL\n");
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ret = UNIT_FAIL;
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goto exit;
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}
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/* Allocate a CPU buffer */
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os_buf.buf = nvgpu_kzalloc(g, buf_size);
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if (os_buf.buf == NULL) {
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unit_err(m, "Failed to allocate a CPU buffer\n");
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ret = UNIT_FAIL;
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goto free_sgt_os_buf;
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}
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os_buf.size = buf_size;
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memset(&sgl_list[0], 0, sizeof(sgl_list[0]));
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sgl_list[0].phys = cpu_pa;
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sgl_list[0].dma = 0;
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sgl_list[0].length = buf_size;
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mem.size = buf_size;
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mem.cpu_va = os_buf.buf;
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/* Create sgt */
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sgt = custom_sgt_create(m, g, &mem, sgl_list, 1);
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if (sgt == NULL) {
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ret = UNIT_FAIL;
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goto free_sgt_os_buf;
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}
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if (fixed_gpu_va) {
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size_t num_pages = DIV_ROUND_UP(buf_size, page_size);
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u64 gpu_va_copy = gpu_va;
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unit_info(m, "Allocating VM Area for fixed GPU VA mapping\n");
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ret = nvgpu_vm_area_alloc(vm,
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num_pages,
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page_size,
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&gpu_va_copy,
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NVGPU_VM_AREA_ALLOC_FIXED_OFFSET);
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if (ret != 0) {
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unit_err(m, "Failed to allocate a VM area\n");
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ret = UNIT_FAIL;
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goto free_sgt_os_buf;
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}
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if (gpu_va_copy != gpu_va) {
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unit_err(m, "VM area created at the wrong GPU VA\n");
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ret = UNIT_FAIL;
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goto free_vm_area;
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}
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}
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mapped_buf = nvgpu_vm_map(vm,
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&os_buf,
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sgt,
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gpu_va,
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buf_size,
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0,
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gk20a_mem_flag_none,
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NVGPU_VM_MAP_CACHEABLE,
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0,
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0,
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NULL,
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APERTURE_SYSMEM);
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if (mapped_buf == NULL) {
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unit_err(m, "Failed to map buffer into the GPU virtual address"
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" space\n");
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ret = UNIT_FAIL;
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goto free_vm_area;
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}
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/* Check if we can find the mapped buffer */
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mapped_buf_check = nvgpu_vm_find_mapped_buf(vm, mapped_buf->addr);
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if (mapped_buf_check == NULL) {
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unit_err(m, "Can't find mapped buffer\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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if (mapped_buf_check->addr != mapped_buf->addr) {
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unit_err(m, "Invalid buffer GPU VA\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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/*
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* Based on the virtual address returned, lookup the corresponding PTE
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*/
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ret = __nvgpu_get_pte(g, vm, mapped_buf->addr, pte);
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if (ret != 0) {
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unit_err(m, "PTE lookup failed\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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/* Check if PTE is valid */
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if (!pte_is_valid(pte)) {
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unit_err(m, "Invalid PTE!\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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/* Check if PTE corresponds to the physical address we requested */
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if (pte_get_phys_addr(m, pte) != cpu_pa) {
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unit_err(m, "Unexpected physical address in PTE\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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/* Check if the buffer's GPU VA is aligned correctly */
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if (!IS_ALIGNED(mapped_buf->addr, alignment)) {
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unit_err(m, "Incorrect buffer GPU VA alignment\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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/*
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* If a specific GPU VA was requested, check that the buffer's GPU VA
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* matches the requested GPU VA
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*/
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if (fixed_gpu_va && (mapped_buf->addr != gpu_va)) {
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unit_err(m, "Mapped buffer's GPU VA does not match requested"
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" GPU VA\n");
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ret = UNIT_FAIL;
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goto free_mapped_buf;
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}
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ret = UNIT_SUCCESS;
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free_mapped_buf:
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if (mapped_buf != NULL) {
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nvgpu_vm_unmap(vm, mapped_buf->addr, NULL);
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}
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free_vm_area:
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if (fixed_gpu_va) {
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ret = nvgpu_vm_area_free(vm, gpu_va);
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if (ret != 0) {
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unit_err(m, "Failed to free vm area\n");
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ret = UNIT_FAIL;
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}
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}
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free_sgt_os_buf:
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if (sgt != NULL) {
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nvgpu_sgt_free(g, sgt);
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}
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if (os_buf.buf != NULL) {
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nvgpu_kfree(g, os_buf.buf);
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}
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exit:
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if (ret == UNIT_FAIL) {
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unit_err(m, "Buffer mapping failed\n");
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}
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return ret;
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}
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/*
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* This is the test for requirement NVGPU-RQCD-45.C1.
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* Requirement: The VM unit shall be able to map a buffer of memory such that
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* the GPU may access that memory.
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*
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* This test does the following:
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* - Initialize a VM with the following characteristics:
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* - 64KB large page support enabled
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* - Low hole size = 64MB
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* - Address space size = 128GB
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* - Kernel reserved space size = 4GB
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* - Map a 4KB buffer into the VM
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* - Check that the resulting GPU virtual address is aligned to 4KB
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* - Unmap the buffer
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* - Map a 64KB buffer into the VM
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* - Check that the resulting GPU virtual address is aligned to 64KB
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* - Unmap the buffer
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* - Uninitialize the VM
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*/
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static int test_map_buf(struct unit_module *m, struct gk20a *g, void *__args)
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{
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int ret = UNIT_SUCCESS;
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struct vm_gk20a *vm = NULL;
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u64 low_hole = 0;
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u64 user_vma = 0;
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u64 kernel_reserved = 0;
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u64 aperture_size = 0;
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bool big_pages = true;
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size_t buf_size = 0;
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size_t page_size = 0;
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size_t alignment = 0;
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if (m == NULL) {
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ret = UNIT_FAIL;
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goto exit;
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}
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if (g == NULL) {
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unit_err(m, "gk20a is NULL\n");
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ret = UNIT_FAIL;
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goto exit;
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}
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/* Initialize test environment */
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ret = init_test_env(m, g);
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if (ret != UNIT_SUCCESS) {
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goto exit;
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}
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/* Initialize VM */
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big_pages = true;
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low_hole = SZ_1M * 64;
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aperture_size = 128 * SZ_1G;
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kernel_reserved = 4 * SZ_1G - low_hole;
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user_vma = aperture_size - low_hole - kernel_reserved;
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unit_info(m, "Initializing VM:\n");
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unit_info(m, " - Low Hole Size = 0x%llx\n", low_hole);
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unit_info(m, " - User Aperture Size = 0x%llx\n", user_vma);
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unit_info(m, " - Kernel Reserved Size = 0x%llx\n", kernel_reserved);
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unit_info(m, " - Total Aperture Size = 0x%llx\n", aperture_size);
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vm = nvgpu_vm_init(g,
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g->ops.mm.gmmu.get_default_big_page_size(),
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low_hole,
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kernel_reserved,
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aperture_size,
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big_pages,
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false,
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true,
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__func__);
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if (vm == NULL) {
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unit_err(m, "Failed to init VM\n");
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ret = UNIT_FAIL;
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goto exit;
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}
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/* Map 4KB buffer */
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buf_size = SZ_4K;
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page_size = SZ_4K;
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alignment = SZ_4K;
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unit_info(m, "Mapping Buffer:\n");
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unit_info(m, " - CPU PA = 0x%llx\n", BUF_CPU_PA);
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unit_info(m, " - Buffer Size = 0x%lx\n", buf_size);
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unit_info(m, " - Page Size = 0x%lx\n", page_size);
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unit_info(m, " - Alignment = 0x%lx\n", alignment);
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ret = map_buffer(m,
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g,
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vm,
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BUF_CPU_PA,
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0,
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buf_size,
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page_size,
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alignment);
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if (ret != UNIT_SUCCESS) {
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unit_err(m, "4KB buffer mapping failed\n");
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goto exit;
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}
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/* Map 64KB buffer */
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buf_size = SZ_64K;
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page_size = SZ_64K;
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alignment = SZ_64K;
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unit_info(m, "Mapping Buffer:\n");
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unit_info(m, " - CPU PA = 0x%llx\n", BUF_CPU_PA);
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unit_info(m, " - Buffer Size = 0x%lx\n", buf_size);
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unit_info(m, " - Page Size = 0x%lx\n", page_size);
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unit_info(m, " - Alignment = 0x%lx\n", alignment);
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ret = map_buffer(m,
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g,
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vm,
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BUF_CPU_PA,
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0,
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buf_size,
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page_size,
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alignment);
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if (ret != UNIT_SUCCESS) {
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unit_err(m, "64KB buffer mapping failed\n");
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goto exit;
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}
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ret = UNIT_SUCCESS;
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exit:
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if (vm != NULL) {
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nvgpu_vm_put(vm);
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}
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return ret;
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}
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/*
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* This is the test for requirement NVGPU-RQCD-45.C2.
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* Requirement: When a GPU virtual address is passed into the nvgpu_vm_map()
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* function the resulting GPU virtual address of the map does/does not match
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* the requested GPU virtual address.
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*
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* This test does the following:
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* - Initialize a VM with the following characteristics:
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* - 64KB large page support enabled
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* - Low hole size = 64MB
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* - Address space size = 128GB
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* - Kernel reserved space size = 4GB
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* - Map a 4KB buffer into the VM at a specific GPU virtual address
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* - Check that the resulting GPU virtual address is aligned to 4KB
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* - Check that the resulting GPU VA is the same as the requested GPU VA
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* - Unmap the buffer
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* - Map a 64KB buffer into the VM at a specific GPU virtual address
|
|
* - Check that the resulting GPU virtual address is aligned to 64KB
|
|
* - Check that the resulting GPU VA is the same as the requested GPU VA
|
|
* - Unmap the buffer
|
|
* - Uninitialize the VM
|
|
*/
|
|
static int test_map_buf_gpu_va(struct unit_module *m,
|
|
struct gk20a *g,
|
|
void *__args)
|
|
{
|
|
int ret = UNIT_SUCCESS;
|
|
struct vm_gk20a *vm = NULL;
|
|
u64 low_hole = 0;
|
|
u64 user_vma = 0;
|
|
u64 user_vma_limit = 0;
|
|
u64 kernel_reserved = 0;
|
|
u64 aperture_size = 0;
|
|
u64 gpu_va = 0;
|
|
bool big_pages = true;
|
|
size_t buf_size = 0;
|
|
size_t page_size = 0;
|
|
size_t alignment = 0;
|
|
|
|
if (m == NULL) {
|
|
ret = UNIT_FAIL;
|
|
goto exit;
|
|
}
|
|
if (g == NULL) {
|
|
unit_err(m, "gk20a is NULL\n");
|
|
ret = UNIT_FAIL;
|
|
goto exit;
|
|
}
|
|
|
|
/* Initialize test environment */
|
|
ret = init_test_env(m, g);
|
|
if (ret != UNIT_SUCCESS) {
|
|
goto exit;
|
|
}
|
|
|
|
/* Initialize VM */
|
|
big_pages = true;
|
|
low_hole = SZ_1M * 64;
|
|
aperture_size = 128 * SZ_1G;
|
|
kernel_reserved = 4 * SZ_1G - low_hole;
|
|
user_vma = aperture_size - low_hole - kernel_reserved;
|
|
user_vma_limit = aperture_size - kernel_reserved;
|
|
unit_info(m, "Initializing VM:\n");
|
|
unit_info(m, " - Low Hole Size = 0x%llx\n", low_hole);
|
|
unit_info(m, " - User Aperture Size = 0x%llx\n", user_vma);
|
|
unit_info(m, " - Kernel Reserved Size = 0x%llx\n", kernel_reserved);
|
|
unit_info(m, " - Total Aperture Size = 0x%llx\n", aperture_size);
|
|
vm = nvgpu_vm_init(g,
|
|
g->ops.mm.gmmu.get_default_big_page_size(),
|
|
low_hole,
|
|
kernel_reserved,
|
|
aperture_size,
|
|
big_pages,
|
|
false,
|
|
true,
|
|
__func__);
|
|
if (vm == NULL) {
|
|
unit_err(m, "Failed to init VM\n");
|
|
ret = UNIT_FAIL;
|
|
goto exit;
|
|
}
|
|
|
|
/* Map 4KB buffer */
|
|
buf_size = SZ_4K;
|
|
page_size = SZ_4K;
|
|
alignment = SZ_4K;
|
|
/*
|
|
* Calculate a valid base GPU VA for the buffer. We're multiplying
|
|
* buf_size by 10 just to be on the safe side.
|
|
*/
|
|
gpu_va = user_vma_limit - buf_size*10;
|
|
unit_info(m, "Mapping Buffer:\n");
|
|
unit_info(m, " - CPU PA = 0x%llx\n", BUF_CPU_PA);
|
|
unit_info(m, " - GPU VA = 0x%llx\n", gpu_va);
|
|
unit_info(m, " - Buffer Size = 0x%lx\n", buf_size);
|
|
unit_info(m, " - Page Size = 0x%lx\n", page_size);
|
|
unit_info(m, " - Alignment = 0x%lx\n", alignment);
|
|
ret = map_buffer(m,
|
|
g,
|
|
vm,
|
|
BUF_CPU_PA,
|
|
gpu_va,
|
|
buf_size,
|
|
page_size,
|
|
alignment);
|
|
if (ret != UNIT_SUCCESS) {
|
|
unit_err(m, "4KB buffer mapping failed\n");
|
|
goto exit;
|
|
}
|
|
|
|
/* Map 64KB buffer */
|
|
buf_size = SZ_64K;
|
|
page_size = SZ_64K;
|
|
alignment = SZ_64K;
|
|
/*
|
|
* Calculate a valid base GPU VA for the buffer. We're multiplying
|
|
* buf_size by 10 just to be on the safe side.
|
|
*/
|
|
gpu_va = user_vma_limit - buf_size*10;
|
|
unit_info(m, "Mapping Buffer:\n");
|
|
unit_info(m, " - CPU PA = 0x%llx\n", BUF_CPU_PA);
|
|
unit_info(m, " - GPU VA = 0x%llx\n", gpu_va);
|
|
unit_info(m, " - Buffer Size = 0x%lx\n", buf_size);
|
|
unit_info(m, " - Page Size = 0x%lx\n", page_size);
|
|
unit_info(m, " - Alignment = 0x%lx\n", alignment);
|
|
ret = map_buffer(m,
|
|
g,
|
|
vm,
|
|
BUF_CPU_PA,
|
|
gpu_va,
|
|
buf_size,
|
|
page_size,
|
|
alignment);
|
|
if (ret != UNIT_SUCCESS) {
|
|
unit_err(m, "64KB buffer mapping failed\n");
|
|
goto exit;
|
|
}
|
|
|
|
ret = UNIT_SUCCESS;
|
|
|
|
exit:
|
|
if (vm != NULL) {
|
|
nvgpu_vm_put(vm);
|
|
}
|
|
|
|
return ret;
|
|
}
|
|
|
|
struct unit_module_test vm_tests[] = {
|
|
UNIT_TEST_REQ("NVGPU-RQCD-45.C1",
|
|
VM_REQ1_UID,
|
|
"V5",
|
|
map_buf,
|
|
test_map_buf,
|
|
NULL, 0),
|
|
UNIT_TEST_REQ("NVGPU-RQCD-45.C2",
|
|
VM_REQ1_UID,
|
|
"V5",
|
|
map_buf_gpu_va,
|
|
test_map_buf_gpu_va,
|
|
NULL, 0),
|
|
};
|
|
|
|
UNIT_MODULE(vm, vm_tests, UNIT_PRIO_NVGPU_TEST);
|