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014ace5a85
This patch begins splitting out the VM implementation from mm_gk20a.c and moves it to common/linux/vm.c and common/mm/vm.c. This split is necessary because the VM code has two portions: first, an interface for the OS specific code to use (i.e userspace mappings), and second, a set of APIs for the driver to use (init, cleanup, etc) which are not OS specific. This is only the beginning of the split - there's still a lot of things that need to be carefully moved around. JIRA NVGPU-12 JIRA NVGPU-30 Change-Id: I3b57cba245d7daf9e4326a143b9c6217e0f28c96 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1477743 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
95 lines
2.6 KiB
C
95 lines
2.6 KiB
C
/*
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* Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __COMMON_LINUX_VM_PRIV_H__
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#define __COMMON_LINUX_VM_PRIV_H__
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#include <nvgpu/types.h>
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struct sg_table;
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struct dma_buf;
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struct vm_gk20a;
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struct vm_gk20a_mapping_batch;
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struct buffer_attrs {
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struct sg_table *sgt;
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u64 size;
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u64 align;
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u32 ctag_offset;
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u32 ctag_lines;
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u32 ctag_allocated_lines;
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int pgsz_idx;
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u8 kind_v;
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u8 uc_kind_v;
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bool ctag_user_mappable;
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};
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u64 nvgpu_vm_map(struct vm_gk20a *vm,
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struct dma_buf *dmabuf,
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u64 offset_align,
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u32 flags,
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int kind,
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bool user_mapped,
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int rw_flag,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *mapping_batch);
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int nvgpu_vm_map_compbits(struct vm_gk20a *vm,
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u64 mapping_gva,
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u64 *compbits_win_gva,
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u64 *mapping_iova,
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u32 flags);
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/* Note: batch may be NULL if map op is not part of a batch */
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int nvgpu_vm_map_buffer(struct vm_gk20a *vm,
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int dmabuf_fd,
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u64 *offset_align,
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u32 flags, /* NVGPU_AS_MAP_BUFFER_FLAGS_ */
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int kind,
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u64 buffer_offset,
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u64 mapping_size,
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struct vm_gk20a_mapping_batch *batch);
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void nvgpu_vm_unmap(struct vm_gk20a *vm, u64 offset);
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/* find buffer corresponding to va */
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int nvgpu_vm_find_buffer(struct vm_gk20a *vm, u64 gpu_va,
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struct dma_buf **dmabuf,
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u64 *offset);
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enum nvgpu_aperture gk20a_dmabuf_aperture(struct gk20a *g,
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struct dma_buf *dmabuf);
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int validate_fixed_buffer(struct vm_gk20a *vm,
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struct buffer_attrs *bfr,
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u64 map_offset, u64 map_size,
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struct vm_reserved_va_node **pva_node);
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int setup_buffer_kind_and_compression(struct vm_gk20a *vm,
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u32 flags,
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struct buffer_attrs *bfr,
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enum gmmu_pgsz_gk20a pgsz_idx);
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int gk20a_alloc_comptags(struct gk20a *g,
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struct device *dev,
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struct dma_buf *dmabuf,
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struct gk20a_comptag_allocator *allocator,
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u32 lines, bool user_mappable,
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u64 *ctag_map_win_size,
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u32 *ctag_map_win_ctagline);
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void gk20a_vm_unmap_locked_kref(struct kref *ref);
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#endif
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