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This unit test covers most of the nvgpu.common.fifo.preempt module lines and almost all branches. Jira NVGPU-3698 Change-Id: I3960cd77c88126659e4d990f4d27dc43850f9ae4 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2236730 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
274 lines
6.7 KiB
C
274 lines
6.7 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <stdlib.h>
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#include <unistd.h>
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#include <unit/io.h>
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#include <unit/unit.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/runlist.h>
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#include <nvgpu/preempt.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/posix/posix-fault-injection.h>
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#include <nvgpu/posix/dma.h>
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#include <nvgpu/io.h>
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#include "hal/fifo/runlist_ram_gk20a.h"
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#include "hal/fifo/tsg_gk20a.h"
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#include "nvgpu/hw/gk20a/hw_ram_gk20a.h"
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#include "nvgpu-preempt.h"
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#include "nvgpu/hw/gk20a/hw_fifo_gk20a.h"
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#define RL_MAX_TIMESLICE_TIMEOUT ram_rl_entry_timeslice_timeout_v(U32_MAX)
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#define RL_MAX_TIMESLICE_SCALE ram_rl_entry_timeslice_scale_v(U32_MAX)
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#include "../nvgpu-fifo.h"
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#ifdef PREEMPT_UNIT_DEBUG
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#define unit_verbose unit_info
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#else
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#define unit_verbose(unit, msg, ...) \
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do { \
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if (0) { \
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unit_info(unit, msg, ##__VA_ARGS__); \
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} \
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} while (0)
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#endif
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#define assert(cond) unit_assert(cond, goto done)
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#define MAX_STUB 2
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struct stub_ctx {
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const char *name;
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u32 chid;
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u32 count;
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u32 tsgid;
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u32 pbdma_id;
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};
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struct stub_ctx stub[MAX_STUB];
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struct preempt_unit_ctx {
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u32 branches;
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};
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static struct preempt_unit_ctx unit_ctx;
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static void subtest_setup(u32 branches)
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{
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u32 i;
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unit_ctx.branches = branches;
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memset(stub, 0, sizeof(stub));
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for (i = 0; i < MAX_STUB; i++) {
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stub[i].name = "";
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stub[i].count = 0;
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stub[i].chid = NVGPU_INVALID_CHANNEL_ID;
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stub[i].tsgid = NVGPU_INVALID_TSG_ID;
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}
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}
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#define branches_str test_fifo_flags_str
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#define pruned test_fifo_subtest_pruned
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#define F_PREEMPT_CHANNEL BIT(0)
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#define F_PREEMPT_LAST BIT(1)
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static const char *f_preempt[] = {
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"preempt_tsg",
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"preempt_channel",
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};
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static int stub_fifo_preempt_channel(struct gk20a *g, struct nvgpu_channel *ch)
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{
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stub[0].chid = ch->chid;
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return 0;
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}
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static int stub_fifo_preempt_tsg(struct gk20a *g, struct nvgpu_tsg *tsg)
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{
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stub[0].tsgid = tsg->tsgid;
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return 0;
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}
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int test_preempt(struct unit_module *m, struct gk20a *g, void *args)
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{
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struct gpu_ops gops = g->ops;
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struct nvgpu_channel *ch = NULL;
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u32 runlist_id = NVGPU_INVALID_RUNLIST_ID;
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bool privileged = false;
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u32 branches = 0U;
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int ret = UNIT_FAIL;
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int err = 0U;
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ch = nvgpu_channel_open_new(g, runlist_id,
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privileged, getpid(), getpid());
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assert(ch != NULL);
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g->ops.fifo.preempt_tsg = stub_fifo_preempt_tsg;
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g->ops.fifo.preempt_channel = stub_fifo_preempt_channel;
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for (branches = 0U; branches < F_PREEMPT_LAST;
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branches++) {
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unit_verbose(m, "%s branches=%u\n", __func__, branches);
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subtest_setup(branches);
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ch->tsgid = (branches & F_PREEMPT_CHANNEL) ?
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NVGPU_INVALID_TSG_ID : 0;
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err = nvgpu_preempt_channel(g, ch);
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assert(err == 0);
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if (branches & F_PREEMPT_CHANNEL) {
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assert(stub[0].chid == ch->chid);
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} else {
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assert(stub[0].tsgid == ch->tsgid);
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}
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}
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ret = UNIT_SUCCESS;
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done:
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if (ret != UNIT_SUCCESS) {
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unit_err(m, "%s branches=%s\n", __func__,
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branches_str(branches, f_preempt));
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}
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g->ops = gops;
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return ret;
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}
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#define F_PREEMPT_POLL_PBDMA_NULL BIT(0)
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#define F_PREEMPT_POLL_TSG_NULL BIT(1)
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#define F_PREEMPT_POLL_PBDMA_BUSY BIT(2)
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#define F_PREEMPT_POLL_LAST BIT(3)
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static const char *f_preempt_poll[] = {
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"preempt_poll_pbdma_null",
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"tsg_null",
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"preempt_poll_pbdma_busy",
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};
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static int stub_fifo_preempt_poll_pbdma_busy(struct gk20a *g, u32 tsgid,
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u32 pbdma_id)
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{
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stub[0].tsgid = tsgid;
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stub[0].pbdma_id = pbdma_id;
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return -EBUSY;
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}
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static int stub_fifo_preempt_poll_pbdma(struct gk20a *g, u32 tsgid,
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u32 pbdma_id)
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{
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stub[0].tsgid = tsgid;
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stub[0].pbdma_id = pbdma_id;
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return 0;
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}
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int test_preempt_poll_tsg_on_pbdma(struct unit_module *m, struct gk20a *g,
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void *args)
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{
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struct gpu_ops gops = g->ops;
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struct nvgpu_tsg *tsg;
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struct nvgpu_fifo *f = &g->fifo;
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u32 branches = 0U;
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int ret = UNIT_FAIL;
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u32 prune = F_PREEMPT_POLL_PBDMA_NULL | F_PREEMPT_POLL_TSG_NULL;
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tsg = nvgpu_tsg_open(g, getpid());
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assert(tsg != NULL);
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tsg->runlist_id = 0;
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for (branches = 0U; branches < F_PREEMPT_POLL_LAST;
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branches++) {
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if (pruned(branches, prune)) {
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unit_verbose(m, "%s branches=%s (pruned)\n", __func__,
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branches_str(branches, f_preempt_poll));
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continue;
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}
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subtest_setup(branches);
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unit_verbose(m, "%s branches=%s\n", __func__,
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branches_str(branches, f_preempt_poll));
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g->ops.fifo.preempt_poll_pbdma =
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(branches & F_PREEMPT_POLL_PBDMA_NULL) ?
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NULL : ((branches & F_PREEMPT_POLL_PBDMA_BUSY) ?
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stub_fifo_preempt_poll_pbdma_busy :
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stub_fifo_preempt_poll_pbdma);
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if (branches & F_PREEMPT_POLL_TSG_NULL) {
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nvgpu_preempt_poll_tsg_on_pbdma(g, NULL);
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} else {
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nvgpu_preempt_poll_tsg_on_pbdma(g, tsg);
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}
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if (branches & F_PREEMPT_POLL_TSG_NULL) {
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assert(stub[0].tsgid == NVGPU_INVALID_TSG_ID);
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} else if (!(branches & F_PREEMPT_POLL_PBDMA_NULL)) {
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assert(stub[0].tsgid == 0);
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assert(stub[0].pbdma_id ==
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nvgpu_ffs(f->runlist_info[0]->pbdma_bitmask));
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}
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}
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ret = UNIT_SUCCESS;
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done:
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if (ret != UNIT_SUCCESS) {
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unit_err(m, "%s branches=%s\n", __func__,
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branches_str(branches, f_preempt_poll));
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}
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g->ops = gops;
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return ret;
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}
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int test_preempt_get_timeout(struct unit_module *m, struct gk20a *g, void *args)
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{
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u32 timeout;
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int ret = UNIT_FAIL;
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timeout = nvgpu_preempt_get_timeout(g);
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assert(timeout == 0U);
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ret = UNIT_SUCCESS;
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done:
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return ret;
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}
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struct unit_module_test nvgpu_preempt_tests[] = {
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UNIT_TEST(init_support, test_fifo_init_support, &unit_ctx, 0),
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UNIT_TEST(preempt, test_preempt, NULL, 0),
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UNIT_TEST(preempt_poll, test_preempt_poll_tsg_on_pbdma, NULL, 0),
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UNIT_TEST(get_timeout, test_preempt_get_timeout, NULL, 0),
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UNIT_TEST(remove_support, test_fifo_remove_support, &unit_ctx, 0),
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};
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UNIT_MODULE(nvgpu_preempt, nvgpu_preempt_tests, UNIT_PRIO_NVGPU_TEST);
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