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git://nv-tegra.nvidia.com/linux-nvgpu.git
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c1393d5b68
Update the high level mapping logic. Instead of iterating over the GPU VA iterate over the scatter-gather table chunks. As a result each GMMU page table update call is simplified dramatically. This also modifies the chip level code to no longer require an SGL as an argument. Each call to the chip level code will be guaranteed to be contiguous so it only has to worry about making a mapping from virt -> phys. This removes the dependency on Linux that the chip code currently has. With this patch the core GMMU code still uses the Linux SGL but the logic is highly transferable to a different, nvgpu specific, scatter gather list format in the near future. The last major update is to push most of the page table attribute arguments to a struct. That struct is passed on through the various mapping levels. This makes the funtions calls more simple and easier to follow. JIRA NVGPU-30 Change-Id: Ibb6b11755f99818fe642622ca0bd4cbed054f602 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master/r/1484104 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
115 lines
3.0 KiB
C
115 lines
3.0 KiB
C
/*
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* GK20A memory interface
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*
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* Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include <trace/events/gk20a.h>
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#include "gk20a.h"
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#include "kind_gk20a.h"
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#include "fb_gk20a.h"
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#include <nvgpu/timers.h>
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#include <nvgpu/hw/gk20a/hw_mc_gk20a.h>
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#include <nvgpu/hw/gk20a/hw_fb_gk20a.h>
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void fb_gk20a_reset(struct gk20a *g)
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{
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u32 val;
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gk20a_dbg_info("reset gk20a fb");
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g->ops.mc.reset(g, mc_enable_pfb_enabled_f() |
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mc_enable_l2_enabled_f() |
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mc_enable_xbar_enabled_f() |
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mc_enable_hub_enabled_f());
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val = gk20a_readl(g, mc_elpg_enable_r());
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val |= mc_elpg_enable_xbar_enabled_f()
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| mc_elpg_enable_pfb_enabled_f()
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| mc_elpg_enable_hub_enabled_f();
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gk20a_writel(g, mc_elpg_enable_r(), val);
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}
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void gk20a_fb_init_hw(struct gk20a *g)
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{
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u32 addr = g->ops.mm.get_iova_addr(g,
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g->mm.sysmem_flush.priv.sgt->sgl, 0) >> 8;
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gk20a_writel(g, fb_niso_flush_sysmem_addr_r(), addr);
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}
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void gk20a_fb_tlb_invalidate(struct gk20a *g, struct nvgpu_mem *pdb)
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{
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struct nvgpu_timeout timeout;
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u32 addr_lo;
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u32 data;
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gk20a_dbg_fn("");
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/* pagetables are considered sw states which are preserved after
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prepare_poweroff. When gk20a deinit releases those pagetables,
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common code in vm unmap path calls tlb invalidate that touches
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hw. Use the power_on flag to skip tlb invalidation when gpu
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power is turned off */
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if (!g->power_on)
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return;
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addr_lo = u64_lo32(nvgpu_mem_get_base_addr(g, pdb, 0) >> 12);
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nvgpu_mutex_acquire(&g->mm.tlb_lock);
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trace_gk20a_mm_tlb_invalidate(g->name);
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nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
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do {
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data = gk20a_readl(g, fb_mmu_ctrl_r());
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if (fb_mmu_ctrl_pri_fifo_space_v(data) != 0)
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break;
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nvgpu_udelay(2);
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} while (!nvgpu_timeout_expired_msg(&timeout,
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"wait mmu fifo space"));
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if (nvgpu_timeout_peek_expired(&timeout))
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goto out;
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nvgpu_timeout_init(g, &timeout, 1000, NVGPU_TIMER_RETRY_TIMER);
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gk20a_writel(g, fb_mmu_invalidate_pdb_r(),
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fb_mmu_invalidate_pdb_addr_f(addr_lo) |
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nvgpu_aperture_mask(g, pdb,
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fb_mmu_invalidate_pdb_aperture_sys_mem_f(),
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fb_mmu_invalidate_pdb_aperture_vid_mem_f()));
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gk20a_writel(g, fb_mmu_invalidate_r(),
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fb_mmu_invalidate_all_va_true_f() |
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fb_mmu_invalidate_trigger_true_f());
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do {
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data = gk20a_readl(g, fb_mmu_ctrl_r());
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if (fb_mmu_ctrl_pri_fifo_empty_v(data) !=
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fb_mmu_ctrl_pri_fifo_empty_false_f())
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break;
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nvgpu_udelay(2);
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} while (!nvgpu_timeout_expired_msg(&timeout,
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"wait mmu invalidate"));
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trace_gk20a_mm_tlb_invalidate_done(g->name);
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out:
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nvgpu_mutex_release(&g->mm.tlb_lock);
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}
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