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d59271c7b7
Replace privsecurity boolean flag in gpu_ops with entry in common flag system. The new common flag is NVGPU_SEC_PRIVSECURITY Jira NVGPU-74 Change-Id: I4b258f5ffbe30a6344ffba0ece51c6f5d47ebec1 Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1525713 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
27 lines
853 B
C
27 lines
853 B
C
/*
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* GP10B PMU
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*
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __PMU_GP10B_H_
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#define __PMU_GP10B_H_
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struct gk20a;
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void gp10b_init_pmu_ops(struct gk20a *g);
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int gp10b_load_falcon_ucode(struct gk20a *g, u32 falconidmask);
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int gp10b_pg_gr_init(struct gk20a *g, u32 pg_engine_id);
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void gp10b_write_dmatrfbase(struct gk20a *g, u32 addr);
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#endif /*__PMU_GP10B_H_*/
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