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af2ccb811d
Added NVGPU_DBG_GPU_IOCTL_SET_CTX_MMU_DEBUG_MODE ioctl to set MMU debug mode for a given context. Added gr.set_mmu_debug_mode HAL to change NV_PGPC_PRI_MMU_DEBUG_CTRL for a given channel. HAL implementation for native case is gm20b_gr_set_mmu_debug_mode. It internally uses regops, which directly writes to the register if the context is resident, or writes to gr context otherwise. Added NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE to enable the feature. NV_PGPC_PRI_MMU_DEBUG_CTRL has to be context switched in FECS ucode, so the feature is only enabled on TU104 for now. Bug 2515097 Change-Id: Ib4efaf06fc47a8539b4474f94c68c20ce225263f Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2110720 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
48 lines
2.0 KiB
C
48 lines
2.0 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/enabled.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/vgpu/vgpu.h>
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#include "vgpu_gv11b.h"
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#include "common/vgpu/init/init_vgpu.h"
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void vgpu_gv11b_init_gpu_characteristics(struct gk20a *g)
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{
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nvgpu_log_fn(g, " ");
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vgpu_init_gpu_characteristics(g);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_TSG_SUBCONTEXTS, true);
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nvgpu_set_enabled(g, NVGPU_USE_COHERENT_SYSMEM, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_IO_COHERENCE, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_SCG, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_SYNCPOINT_ADDRESS, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_USER_SYNCPOINT, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_USERMODE_SUBMIT, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_ZBC_STENCIL, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_PREEMPTION_GFXP, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_PLATFORM_ATOMIC, true);
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nvgpu_set_enabled(g, NVGPU_SUPPORT_SET_CTX_MMU_DEBUG_MODE, false);
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}
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