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Move chip specific mmu fault handling from fifo_gk20a.c to hal/fifo/mmu_fault_gk20a.c Move gk20a_teardown_ch_tsg to hal/rc/rc_gk20a.c JIRA NVGPU-1314 Change-Id: Idf88b1c312bc9f46c2508f2c63e948d71d622297 Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2094051 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
49 lines
2.0 KiB
C
49 lines
2.0 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_FIFO_MMU_FAULT_GK20A_H
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#define NVGPU_FIFO_MMU_FAULT_GK20A_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct mmu_fault_info;
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void gk20a_fifo_get_mmu_fault_desc(struct mmu_fault_info *mmufault);
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void gk20a_fifo_get_mmu_fault_client_desc(struct mmu_fault_info *mmufault);
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void gk20a_fifo_get_mmu_fault_gpc_desc(struct mmu_fault_info *mmufault);
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void gk20a_fifo_get_mmu_fault_info(struct gk20a *g, u32 mmu_fault_id,
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struct mmu_fault_info *mmufault);
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void gk20a_fifo_mmu_fault_info_dump(struct gk20a *g, u32 engine_id,
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u32 mmu_fault_id, bool fake_fault, struct mmu_fault_info *mmufault);
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void gk20a_fifo_handle_dropped_mmu_fault(struct gk20a *g);
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bool gk20a_fifo_handle_mmu_fault(struct gk20a *g, u32 mmu_fault_engines,
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u32 hw_id, bool id_is_tsg);
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bool gk20a_fifo_handle_mmu_fault_locked(struct gk20a *g, u32 mmu_fault_engines,
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u32 hw_id, bool id_is_tsg);
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#endif /* NVGPU_FIFO_MMU_FAULT_GK20A_H */
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