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cert_violation: Casting "-1" from "int" to "unsigned int" without checking its value may result in lost or misinterpreted data. Error: CERT INT31-C: Change "(unsigned int)-1" to "~0U" in posix code. Jira NVGPU-3411 Change-Id: I3f1fed7d0788f9ee5c4f2b3c297d7311a0bf2419 Signed-off-by: Vinod G <vinodg@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2119008 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
176 lines
4.3 KiB
C
176 lines
4.3 KiB
C
/*
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* Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/cond.h>
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int nvgpu_cond_init(struct nvgpu_cond *cond)
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{
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int ret;
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ret = pthread_condattr_init(&cond->attr);
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if (ret != 0) {
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return ret;
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}
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ret = pthread_condattr_setclock(&cond->attr, CLOCK_MONOTONIC);
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if (ret != 0) {
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(void) pthread_condattr_destroy(&cond->attr);
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return ret;
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}
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ret = nvgpu_mutex_init(&cond->mutex);
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if (ret != 0) {
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(void) pthread_condattr_destroy(&cond->attr);
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return ret;
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}
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ret = pthread_cond_init(&cond->cond, &cond->attr);
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if (ret != 0) {
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(void) pthread_condattr_destroy(&cond->attr);
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(void) nvgpu_mutex_destroy(&cond->mutex);
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return ret;
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}
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cond->initialized = true;
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return ret;
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}
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void nvgpu_cond_signal(struct nvgpu_cond *cond)
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{
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if ((cond == NULL) || !(cond->initialized)) {
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BUG();
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}
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nvgpu_mutex_acquire(&cond->mutex);
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(void) pthread_cond_signal(&cond->cond);
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nvgpu_mutex_release(&cond->mutex);
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}
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void nvgpu_cond_signal_interruptible(struct nvgpu_cond *cond)
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{
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if ((cond == NULL) || !(cond->initialized)) {
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BUG();
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}
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nvgpu_mutex_acquire(&cond->mutex);
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(void) pthread_cond_signal(&cond->cond);
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nvgpu_mutex_release(&cond->mutex);
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}
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int nvgpu_cond_broadcast(struct nvgpu_cond *cond)
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{
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int ret;
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if ((cond == NULL) || !(cond->initialized)) {
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return -EINVAL;
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}
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nvgpu_mutex_acquire(&cond->mutex);
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ret = pthread_cond_broadcast(&cond->cond);
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nvgpu_mutex_release(&cond->mutex);
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return ret;
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}
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int nvgpu_cond_broadcast_interruptible(struct nvgpu_cond *cond)
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{
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int ret;
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if ((cond == NULL) || !(cond->initialized)) {
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return -EINVAL;
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}
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nvgpu_mutex_acquire(&cond->mutex);
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ret = pthread_cond_broadcast(&cond->cond);
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nvgpu_mutex_release(&cond->mutex);
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return ret;
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}
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void nvgpu_cond_destroy(struct nvgpu_cond *cond)
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{
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if (cond == NULL) {
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BUG();
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}
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(void) pthread_cond_destroy(&cond->cond);
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nvgpu_mutex_destroy(&cond->mutex);
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(void) pthread_condattr_destroy(&cond->attr);
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cond->initialized = false;
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}
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void nvgpu_cond_signal_locked(struct nvgpu_cond *cond)
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{
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if ((cond == NULL) || !(cond->initialized)) {
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BUG();
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}
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(void) pthread_cond_signal(&cond->cond);
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}
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int nvgpu_cond_broadcast_locked(struct nvgpu_cond *cond)
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{
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if (!cond->initialized) {
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return -EINVAL;
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}
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return pthread_cond_broadcast(&cond->cond);
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}
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void nvgpu_cond_lock(struct nvgpu_cond *cond)
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{
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nvgpu_mutex_acquire(&cond->mutex);
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}
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void nvgpu_cond_unlock(struct nvgpu_cond *cond)
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{
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nvgpu_mutex_release(&cond->mutex);
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}
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int nvgpu_cond_timedwait(struct nvgpu_cond *c, unsigned int *ms)
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{
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int ret;
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s64 t_start_ns, t_ns;
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struct timespec ts;
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if (*ms == NVGPU_COND_WAIT_TIMEOUT_MAX_MS) {
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return pthread_cond_wait(&c->cond, &c->mutex.lock.mutex);
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}
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if (clock_gettime(CLOCK_MONOTONIC, &ts) == -1) {
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return -EFAULT;
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}
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t_start_ns = ts.tv_sec * 1000000000 + ts.tv_nsec;
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t_ns = (s64)(*ms);
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t_ns *= 1000000;
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t_ns += t_start_ns;
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ts.tv_sec = t_ns / 1000000000;
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ts.tv_nsec = t_ns % 1000000000;
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ret = pthread_cond_timedwait(&c->cond, &c->mutex.lock.mutex, &ts);
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if (ret == 0) {
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if (clock_gettime(CLOCK_MONOTONIC, &ts) != -1) {
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t_ns = ((ts.tv_sec * 1000000000) +
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ts.tv_nsec) - t_start_ns;
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t_ns /= 1000000;
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if (*ms <= (unsigned int)t_ns) {
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*ms = 0;
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} else {
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*ms -= (unsigned int)t_ns;
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}
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}
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}
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return ret;
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}
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