mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-22 17:36:20 +03:00
0b9dc3dbc3
Below listed HSI are handled with PMU ISR handler and all these triggers interrupt from individual unit upon issue. -Add ECC check for IMEM, DMEM, DCLS, REG, and MPU as per HSI req -Add MEMERR check for GPU_PMU_ACCESS_TIMEOUT_UNCORRECTED PMU HSI id -Add IOPMP check for GPU_PMU_ILLEGAL_ACCESS_UNCORRECTED PMU HSI id -Add WDT check for GPU_PMU_WDT_UNCORRECTED PMU HSI id Bug 3491596 Bug 3366818 Change-Id: I751d653e447017ac62a2459da2c6bb9da506f438 Signed-off-by: mkumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2686566 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>