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11757aabbd
Remove below calls from fecs_trace_gk20a.c gk20a_fecs_trace_ring_read() gk20a_fecs_trace_poll() gk20a_fecs_trace_periodic_polling() gk20a_fecs_trace_reset() And move them to common gr/fecs_trace unit with below renames nvgpu_gr_fecs_trace_ring_read() nvgpu_gr_fecs_trace_poll() nvgpu_gr_fecs_trace_periodic_polling() nvgpu_gr_fecs_trace_reset() Also update above calls to support QNX use cases by adding vm_update_mask as a parameter Add below HALs for QNX support. These HALs will not be set for linux g->ops.fecs_trace.vm_dev_write() g->ops.fecs_trace.vm_dev_update() Jira NVGPU-1880 Change-Id: Idc305b9288a1df5ca86622b95d6e62a23fdfde7e Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2029258 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
38 lines
1.6 KiB
C
38 lines
1.6 KiB
C
/*
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* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_GK20A_FECS_TRACE_GK20A_H
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#define NVGPU_GK20A_FECS_TRACE_GK20A_H
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struct gk20a;
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struct channel_gk20a;
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struct nvgpu_gpu_ctxsw_trace_filter;
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struct nvgpu_gr_ctx;
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int gk20a_fecs_trace_bind_channel(struct gk20a *g,
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struct channel_gk20a *ch, u32 vmid,
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struct nvgpu_gr_ctx *gr_ctx);
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int gk20a_fecs_trace_unbind_channel(struct gk20a *g, struct channel_gk20a *ch);
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u32 gk20a_fecs_trace_get_buffer_full_mailbox_val(void);
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#endif /* NVGPU_GK20A_FECS_TRACE_GK20A_H */
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