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11b34e891f
As a part of refactoring, need to move clk sw/pmu setup functions from pmu_pstate unit to clk unit as it belongs there. In this patch the public API is moved from pmu_pstate to clk unit and named according to private/public API. NVGPU-4491 Change-Id: I90a7dc821e3a3633c7ac657b398f90e374663d61 Signed-off-by: Abdul Salam <absalam@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2282937 Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
42 lines
1.6 KiB
C
42 lines
1.6 KiB
C
/*
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* Copyright (c) 2016-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_CLK_VIN_H
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#define NVGPU_CLK_VIN_H
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#include <nvgpu/boardobj.h>
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#include <nvgpu/boardobjgrp.h>
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#include <nvgpu/boardobjgrp_e32.h>
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#include <nvgpu/pmu/clk/clk_vin.h>
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struct vin_device_v20 {
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struct nvgpu_vin_device super;
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struct ctrl_clk_vin_device_info_data_v20 data;
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};
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int clk_vin_init_pmupstate(struct gk20a *g);
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void clk_vin_free_pmupstate(struct gk20a *g);
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int clk_pmu_vin_load(struct gk20a *g);
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int clk_vin_sw_setup(struct gk20a *g);
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int clk_vin_pmu_setup(struct gk20a *g);
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#endif /* NVGPU_CLK_VIN_H */
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