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pwr_csb slcg, blcg gating registers are covered by pmu slcg/blcg hence its load functions are not used. Hence, delete the generated data and functions. slcg, blcg ctxsw_firmware and pg_gr gating reglists are null hence delete the generated data and functions. JIRA NVGPU-2175 Change-Id: Ib04d9845331c9a287666d3b8c974e1d3b66a7677 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2263272 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>