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Make a hal/mm/gmmu sub-unit for the GMMU HAL code. Also move the gk20a specific HAL code there. gp10b will happen in the next patch. This change also updates all the GMMU related HAL usage, of which there is quite a bit. Generally the only change is a .gmmu needs to be inserted into the HAL path. Each HAL init was also updated. JIRA NVGPU-2042 Change-Id: I6c46bdfddb8e021f56103d9457fb3e2a226f8947 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2099693 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
310 lines
8.5 KiB
C
310 lines
8.5 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/dma.h>
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#include <nvgpu/gmmu.h>
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#include <nvgpu/nvgpu_mem.h>
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#include <nvgpu/page_allocator.h>
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#include <nvgpu/log.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/enabled.h>
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#include <nvgpu/kmem.h>
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#include <nvgpu/vidmem.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/string.h>
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#include <nvgpu/nvgpu_sgt_os.h>
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#include <nvgpu/linux/dma.h>
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#include <linux/vmalloc.h>
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#include <linux/dma-mapping.h>
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#include "os_linux.h"
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#include "dmabuf_vidmem.h"
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#include "gk20a/mm_gk20a.h"
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#include "platform_gk20a.h"
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static u64 __nvgpu_sgl_ipa(struct gk20a *g, struct nvgpu_sgl *sgl)
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{
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return sg_phys((struct scatterlist *)sgl);
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}
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static u64 __nvgpu_sgl_phys(struct gk20a *g, struct nvgpu_sgl *sgl)
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{
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struct device *dev = dev_from_gk20a(g);
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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u64 ipa = sg_phys((struct scatterlist *)sgl);
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if (platform->phys_addr)
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return platform->phys_addr(g, ipa, NULL);
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return ipa;
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}
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/*
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* Obtain a SYSMEM address from a Linux SGL. This should eventually go away
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* and/or become private to this file once all bad usages of Linux SGLs are
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* cleaned up in the driver.
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*/
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u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl)
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{
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if (nvgpu_is_enabled(g, NVGPU_MM_USE_PHYSICAL_SG) ||
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!nvgpu_iommuable(g))
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return g->ops.mm.gmmu.gpu_phys_addr(g, NULL,
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__nvgpu_sgl_phys(g, (struct nvgpu_sgl *)sgl));
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if (sg_dma_address(sgl) == 0)
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return g->ops.mm.gmmu.gpu_phys_addr(g, NULL,
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__nvgpu_sgl_phys(g, (struct nvgpu_sgl *)sgl));
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if (sg_dma_address(sgl) == DMA_ERROR_CODE)
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return 0;
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return nvgpu_mem_iommu_translate(g, sg_dma_address(sgl));
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}
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/*
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* Obtain the address the GPU should use from the %mem assuming this is a SYSMEM
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* allocation.
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*/
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static u64 nvgpu_mem_get_addr_sysmem(struct gk20a *g, struct nvgpu_mem *mem)
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{
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return nvgpu_mem_get_addr_sgl(g, mem->priv.sgt->sgl);
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}
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/*
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* Return the base address of %mem. Handles whether this is a VIDMEM or SYSMEM
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* allocation.
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*
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* Note: this API does not make sense to use for _VIDMEM_ buffers with greater
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* than one scatterlist chunk. If there's more than one scatterlist chunk then
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* the buffer will not be contiguous. As such the base address probably isn't
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* very useful. This is true for SYSMEM as well, if there's no IOMMU.
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*
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* However! It _is_ OK to use this on discontiguous sysmem buffers _if_ there's
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* an IOMMU present and enabled for the GPU.
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*
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* %attrs can be NULL. If it is not NULL then it may be inspected to determine
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* if the address needs to be modified before writing into a PTE.
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*/
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u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem)
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{
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struct nvgpu_page_alloc *alloc;
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if (mem->aperture == APERTURE_SYSMEM)
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return nvgpu_mem_get_addr_sysmem(g, mem);
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/*
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* Otherwise get the vidmem address.
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*/
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alloc = mem->vidmem_alloc;
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/* This API should not be used with > 1 chunks */
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WARN_ON(alloc->nr_chunks != 1);
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return alloc->base;
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}
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/*
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* This should only be used on contiguous buffers regardless of whether
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* there's an IOMMU present/enabled. This applies to both SYSMEM and
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* VIDMEM.
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*/
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u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem)
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{
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/*
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* For a VIDMEM buf, this is identical to simply get_addr() so just fall
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* back to that.
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*/
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if (mem->aperture == APERTURE_VIDMEM)
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return nvgpu_mem_get_addr(g, mem);
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return __nvgpu_sgl_phys(g, (struct nvgpu_sgl *)mem->priv.sgt->sgl);
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}
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/*
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* Be careful how you use this! You are responsible for correctly freeing this
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* memory.
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*/
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int nvgpu_mem_create_from_mem(struct gk20a *g,
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struct nvgpu_mem *dest, struct nvgpu_mem *src,
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u64 start_page, int nr_pages)
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{
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int ret;
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u64 start = start_page * PAGE_SIZE;
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u64 size = nr_pages * PAGE_SIZE;
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dma_addr_t new_iova;
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if (src->aperture != APERTURE_SYSMEM)
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return -EINVAL;
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/* Some silly things a caller might do... */
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if (size > src->size)
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return -EINVAL;
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if ((start + size) > src->size)
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return -EINVAL;
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dest->mem_flags = src->mem_flags | NVGPU_MEM_FLAG_SHADOW_COPY;
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dest->aperture = src->aperture;
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dest->skip_wmb = src->skip_wmb;
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dest->size = size;
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/* Re-use the CPU mapping only if the mapping was made by the DMA API */
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if (!(src->priv.flags & NVGPU_DMA_NO_KERNEL_MAPPING))
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dest->cpu_va = src->cpu_va + (PAGE_SIZE * start_page);
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dest->priv.pages = src->priv.pages + start_page;
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dest->priv.flags = src->priv.flags;
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new_iova = sg_dma_address(src->priv.sgt->sgl) ?
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sg_dma_address(src->priv.sgt->sgl) + start : 0;
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/*
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* Make a new SG table that is based only on the subset of pages that
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* is passed to us. This table gets freed by the dma free routines.
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*/
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if (src->priv.flags & NVGPU_DMA_NO_KERNEL_MAPPING)
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ret = nvgpu_get_sgtable_from_pages(g, &dest->priv.sgt,
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src->priv.pages + start_page,
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new_iova, size);
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else
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ret = nvgpu_get_sgtable(g, &dest->priv.sgt, dest->cpu_va,
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new_iova, size);
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return ret;
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}
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static struct nvgpu_sgl *nvgpu_mem_linux_sgl_next(struct nvgpu_sgl *sgl)
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{
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return (struct nvgpu_sgl *)sg_next((struct scatterlist *)sgl);
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}
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static u64 nvgpu_mem_linux_sgl_ipa(struct gk20a *g, struct nvgpu_sgl *sgl)
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{
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return __nvgpu_sgl_ipa(g, sgl);
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}
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static u64 nvgpu_mem_linux_sgl_ipa_to_pa(struct gk20a *g,
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struct nvgpu_sgl *sgl, u64 ipa, u64 *pa_len)
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{
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struct device *dev = dev_from_gk20a(g);
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struct gk20a_platform *platform = gk20a_get_platform(dev);
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if (platform->phys_addr)
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return platform->phys_addr(g, ipa, pa_len);
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return ipa;
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}
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static u64 nvgpu_mem_linux_sgl_phys(struct gk20a *g, struct nvgpu_sgl *sgl)
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{
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return (u64)__nvgpu_sgl_phys(g, sgl);
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}
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static u64 nvgpu_mem_linux_sgl_dma(struct nvgpu_sgl *sgl)
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{
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return (u64)sg_dma_address((struct scatterlist *)sgl);
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}
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static u64 nvgpu_mem_linux_sgl_length(struct nvgpu_sgl *sgl)
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{
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return (u64)((struct scatterlist *)sgl)->length;
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}
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static u64 nvgpu_mem_linux_sgl_gpu_addr(struct gk20a *g,
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struct nvgpu_sgl *sgl,
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struct nvgpu_gmmu_attrs *attrs)
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{
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if (sg_dma_address((struct scatterlist *)sgl) == 0)
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return g->ops.mm.gmmu.gpu_phys_addr(g, attrs,
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__nvgpu_sgl_phys(g, sgl));
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if (sg_dma_address((struct scatterlist *)sgl) == DMA_ERROR_CODE)
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return 0;
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return nvgpu_mem_iommu_translate(g,
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sg_dma_address((struct scatterlist *)sgl));
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}
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static bool nvgpu_mem_linux_sgt_iommuable(struct gk20a *g,
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struct nvgpu_sgt *sgt)
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{
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if (nvgpu_is_enabled(g, NVGPU_MM_USE_PHYSICAL_SG))
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return false;
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return true;
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}
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static void nvgpu_mem_linux_sgl_free(struct gk20a *g, struct nvgpu_sgt *sgt)
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{
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/*
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* Free this SGT. All we do is free the passed SGT. The actual Linux
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* SGT/SGL needs to be freed separately.
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*/
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nvgpu_kfree(g, sgt);
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}
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static const struct nvgpu_sgt_ops nvgpu_linux_sgt_ops = {
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.sgl_next = nvgpu_mem_linux_sgl_next,
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.sgl_phys = nvgpu_mem_linux_sgl_phys,
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.sgl_ipa = nvgpu_mem_linux_sgl_ipa,
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.sgl_ipa_to_pa = nvgpu_mem_linux_sgl_ipa_to_pa,
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.sgl_dma = nvgpu_mem_linux_sgl_dma,
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.sgl_length = nvgpu_mem_linux_sgl_length,
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.sgl_gpu_addr = nvgpu_mem_linux_sgl_gpu_addr,
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.sgt_iommuable = nvgpu_mem_linux_sgt_iommuable,
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.sgt_free = nvgpu_mem_linux_sgl_free,
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};
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static struct nvgpu_sgt *__nvgpu_mem_get_sgl_from_vidmem(
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struct gk20a *g,
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struct scatterlist *linux_sgl)
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{
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struct nvgpu_page_alloc *vidmem_alloc;
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vidmem_alloc = nvgpu_vidmem_get_page_alloc(linux_sgl);
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if (!vidmem_alloc)
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return NULL;
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return &vidmem_alloc->sgt;
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}
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struct nvgpu_sgt *nvgpu_linux_sgt_create(struct gk20a *g, struct sg_table *sgt)
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{
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struct nvgpu_sgt *nvgpu_sgt;
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struct scatterlist *linux_sgl = sgt->sgl;
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if (nvgpu_addr_is_vidmem_page_alloc(sg_dma_address(linux_sgl)))
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return __nvgpu_mem_get_sgl_from_vidmem(g, linux_sgl);
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nvgpu_sgt = nvgpu_kzalloc(g, sizeof(*nvgpu_sgt));
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if (!nvgpu_sgt)
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return NULL;
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nvgpu_log(g, gpu_dbg_sgl, "Making Linux SGL!");
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nvgpu_sgt->sgl = (struct nvgpu_sgl *)linux_sgl;
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nvgpu_sgt->ops = &nvgpu_linux_sgt_ops;
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return nvgpu_sgt;
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}
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struct nvgpu_sgt *nvgpu_sgt_os_create_from_mem(struct gk20a *g,
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struct nvgpu_mem *mem)
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{
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return nvgpu_linux_sgt_create(g, mem->priv.sgt);
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}
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