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127aa9735b
Add an interface that the unit test modules can use to interact with nvgpu IO accessors. This interface is incredibly simple but not the easiest to use. More simple wrappers will be added later. JIRA NVGPU-1040 Change-Id: I325f09a1739a58ea6bcb1c74834037d6977ce0e8 Signed-off-by: Nicolas Benech <nbenech@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1741952 GVS: Gerrit_Virtual_Submit Reviewed-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
59 lines
1.8 KiB
C
59 lines
1.8 KiB
C
/*
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* Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __NVGPU_OS_POSIX_H__
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#define __NVGPU_OS_POSIX_H__
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#include "gk20a/gk20a.h"
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struct nvgpu_posix_io_callbacks;
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struct nvgpu_os_posix {
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struct gk20a g;
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/*
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* IO callbacks for handling the nvgpu IO accessors.
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*/
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struct nvgpu_posix_io_callbacks *callbacks;
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/*
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* Memory-mapped register space for unit tests.
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*/
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struct nvgpu_list_node reg_space_head;
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int error_code;
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/*
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* List to record sequence of register writes.
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*/
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struct nvgpu_list_node recorder_head;
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bool recording;
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};
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static inline struct nvgpu_os_posix *nvgpu_os_posix_from_gk20a(struct gk20a *g)
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{
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return container_of(g, struct nvgpu_os_posix, g);
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}
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#endif
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