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The address space limit was being computed with the assumption that the va_limit field is inclusive. The va_limit field is actually not inclusive. It points to the first invalid byte. Thus when generating the adr_limit register the code incorrectly calculated that the address limit should be 0. To fix this the computation now just uses va_limit - 1. Also, the bitwise OR of 0xfff into the lower limit word was incorrect. The bottom 12 bits of the lower 32 bit word are ignored by the GPU and as such should not be populated. Change-Id: Ifcc13343aaf50776f3cf1a1e3726e73ffde5003f Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/756690 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/771151 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>