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80efe558b1
Update nvgpu_rc_pbdma_fault with invalid checks and add BVEC test for it. Make ga10b_fifo_pbdma_isr static. NVGPU-6772 Change-Id: I5485760c53e1fff1278557a5b25659a1fc0e4eaf Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2551617 (cherry picked from commit e917042d395d07cb902580bad3d5a7d0096cc303) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2623625 Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
60 lines
2.2 KiB
C
60 lines
2.2 KiB
C
/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/pbdma_status.h>
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bool nvgpu_pbdma_status_is_chsw_switch(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->chsw_status == NVGPU_PBDMA_CHSW_STATUS_SWITCH;
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}
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bool nvgpu_pbdma_status_is_chsw_load(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->chsw_status == NVGPU_PBDMA_CHSW_STATUS_LOAD;
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}
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bool nvgpu_pbdma_status_is_chsw_save(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->chsw_status == NVGPU_PBDMA_CHSW_STATUS_SAVE;
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}
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bool nvgpu_pbdma_status_is_chsw_valid(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->chsw_status == NVGPU_PBDMA_CHSW_STATUS_VALID;
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}
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bool nvgpu_pbdma_status_ch_not_loaded(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->chsw_status == NVGPU_PBDMA_CHSW_STATUS_INVALID;
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}
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bool nvgpu_pbdma_status_is_id_type_tsg(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->id_type == PBDMA_STATUS_ID_TYPE_TSGID;
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}
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bool nvgpu_pbdma_status_is_next_id_type_tsg(struct nvgpu_pbdma_status_info
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*pbdma_status)
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{
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return pbdma_status->next_id_type == PBDMA_STATUS_NEXT_ID_TYPE_TSGID;
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}
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