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9b7a8f0263
Rule 8.6 requires each identifier with external linkage to have exactly one external definitions. Rule 10.x necessitates operands to have essential type; left and right operands should be of same width and type. This patch fixes above mentioned in nvgpu/hal/fifo/channel_gk20a.h, nvgpu/hal/fifo/channel_gm20b.h and nvgpu/hal/fifo/channel_gv11b_fusa.c Jira NVGPU-3827 Change-Id: I17a1d1bc4b04404b223f73e49330bf1a41d35129 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2154362 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sagar Kamble <skamble@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
45 lines
1.8 KiB
C
45 lines
1.8 KiB
C
/*
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* Copyright (c) 2011-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef FIFO_CHANNEL_GK20A_H
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#define FIFO_CHANNEL_GK20A_H
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struct gk20a;
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struct nvgpu_channel;
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struct nvgpu_channel_hw_state;
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struct nvgpu_debug_context;
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struct nvgpu_channel_dump_info;
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void gk20a_channel_enable(struct nvgpu_channel *ch);
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void gk20a_channel_disable(struct nvgpu_channel *ch);
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void gk20a_channel_read_state(struct gk20a *g, struct nvgpu_channel *ch,
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struct nvgpu_channel_hw_state *state);
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#ifdef CONFIG_NVGPU_HAL_NON_FUSA
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void gk20a_channel_debug_dump(struct gk20a *g,
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struct nvgpu_debug_context *o,
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struct nvgpu_channel_dump_info *info);
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void gk20a_channel_unbind(struct nvgpu_channel *ch);
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#endif
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#endif /* FIFO_CHANNEL_GK20A_H */
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