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cd7194cbc0
Move below chip agnostic gmmu pte functions to common/mm/gmmu/pte.c. - gmmu_aperture_mask() - pte_dbg_print() Default big page size for all chips is 64K. So, move gp10b_mm_get_default_big_page_size() to common file and rename as nvgpu_gmmu_default_big_page_size(). Modify gv11b_gpu_phys_addr() to use get_iommu_bit() hal. JIRA NVGPU-4666 Change-Id: I512c42723faf2d03e5b367879c9c385dcf52cdc2 Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2329560 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
37 lines
1.5 KiB
C
37 lines
1.5 KiB
C
/*
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* Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef HAL_MM_GMMU_GMMU_GP10B_H
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#define HAL_MM_GMMU_GMMU_GP10B_H
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#include <nvgpu/types.h>
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struct gk20a;
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struct gk20a_mmu_level;
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u32 gp10b_mm_get_iommu_bit(struct gk20a *g);
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const struct gk20a_mmu_level *gp10b_mm_get_mmu_levels(
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struct gk20a *g, u64 big_page_size);
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u32 gp10b_get_max_page_table_levels(struct gk20a *g);
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#endif
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