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- Below are warnings encountered when we use same function names in multiple units doxygenfunction: Unable to resolve multiple matches for function “test_setup_env” with arguments () in doxygen xml output. doxygenfunction: Unable to resolve multiple matches for function “test_free_env” with arguments () in doxygen xml output. - Fixing warnings by updating functions with unique names in multiple units JIRA NVGPU-7115 Change-Id: Iaa861040208e101c114f5c556096deb09d08b7fe Signed-off-by: srajum <srajum@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2601798 (cherry picked from commit f57e408ba2fae4ff9b7c54a441e5cc3e75b0c87c) Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2678347 Reviewed-by: svcacv <svcacv@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Shashank Singh <shashsingh@nvidia.com> Reviewed-by: Vaibhav Kachore <vkachore@nvidia.com> GVS: Gerrit_Virtual_Submit
148 lines
4.5 KiB
C
148 lines
4.5 KiB
C
/*
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* Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef UNIT_NVGPU_PTIMER_H
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#define UNIT_NVGPU_PTIMER_H
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struct gk20a;
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struct unit_module;
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/** @addtogroup SWUTS-ptimer
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* @{
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*
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* Software Unit Test Specification for nvgpu.common.ptimer
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*/
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/**
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* Test specification for: ptimer_test_setup_env
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*
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* Description: Setup prerequisites for tests.
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*
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* Test Type: Other (setup)
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*
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* Input: None
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*
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* Steps:
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* - Setup ptimer HAL function pointers.
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* - Setup timer reg space in mockio.
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*
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* Output:
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* - UNIT_FAIL if encounters an error creating reg space
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* - UNIT_SUCCESS otherwise
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*/
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int ptimer_test_setup_env(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: ptimer_test_free_env
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*
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* Description: Release resources from ptimer_test_setup_env()
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*
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* Test Type: Other (setup)
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*
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* Input: ptimer_test_setup_env() has been executed.
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*
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* Steps:
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* - Delete ptimer register space from mockio.
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*
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* Output:
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* - UNIT_FAIL if encounters an error creating reg space
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* - UNIT_SUCCESS otherwise
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*/
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int ptimer_test_free_env(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ptimer_isr
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*
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* Description: Verify the ptimer isr API. The ISR only logs the errors and
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* clears the ISR regs. This test verifies the code paths do not
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* cause errors.
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*
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* Test Type: Feature Based
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*
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* Targets: gops_ptimer.isr, gk20a_ptimer_isr
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*
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* Input: None
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*
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* Steps:
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* - Test isr with 0 register values.
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* - Initialize registers to 0: pri_timeout_save_0, pri_timeout_save_1,
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* pri_timeout_fecs_errcode.
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* - Call isr API.
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* - Verify the save_* regs were all set to 0.
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* - Test with FECS bits set.
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* - Set the fecs bit in the pri_timeout_save_0 reg and an error code in the
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* pri_timeout_fecs_errcode reg.
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* - Call isr API.
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* - Verify the save_* regs were all set to 0.
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* - Test with FECS bits set and verify priv_ring decode error HAL is invoked.
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* - Set the fecs bit in the pri_timeout_save_0 reg and an error code in the
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* pri_timeout_fecs_errcode reg.
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* - Set the HAL priv_ring.decode_error_code to a mock function.
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* - Call isr API.
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* - Verify the fecs error code was passed to the decode_error_code mock
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* function.
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* - Verify the save_* regs were all set to 0.
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* - Test branch for save0 timeout bit being set.
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* - Set the timeout bit in the pri_timeout_save_0 reg.
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* - Call isr API.
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* - Verify the save_* regs were all set to 0.
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*
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* Output:
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* - UNIT_FAIL if encounters an error creating reg space
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* - UNIT_SUCCESS otherwise
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*/
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int test_ptimer_isr(struct unit_module *m,
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struct gk20a *g, void *args);
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/**
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* Test specification for: test_ptimer_scaling
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*
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* Description: Verify the nvgpu_ptimer_scale() API.
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*
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* Test Type: Feature Based, Boundary Values
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*
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* Targets: nvgpu_ptimer_scale
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*
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* Equivalence classes:
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* Variable: timeout
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* - Valid : 0 to U32_MAX/10
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*
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* Input: None
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*
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* Steps:
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* - Initialize ptimer source freq as per gv11b platform freq (i.e. 31250000U).
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* - Call the nvgpu_ptimer_scale() API with below BVEC test values and verify the
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* returned value and error code.
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* Valid test values : 0, 1000, U32_MAX/10
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* Invalid test values : U32_MAX/10 + 1, U32_MAX/5, U32_MAX
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*
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* Output:
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* - UNIT_FAIL if encounters an error creating reg space
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* - UNIT_SUCCESS otherwise
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*/
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int test_ptimer_scaling(struct unit_module *m,
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struct gk20a *g, void *args);
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#endif /* UNIT_NVGPU_PTIMER_H */
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