Vedashree Vidwans afae2efc23 gpu: nvgpu: fix MISRA errors in nvgpu.hal.mm ...

Rule 8.6 requires each identifier with external linkage to have exactly
one external definitions.
Rule 10.x necessitates operands to have essential type; left and right
operands should be of same width and type.
Rule 14.3 doesn't allow controlling expressions to be invariant;
ensuring that all conditions are possible.

Jira NVGPU-3858

Change-Id: I043a3836c4a2cb9c5a52d3053516c517389f55a2
Signed-off-by: Vedashree Vidwans <vvidwans@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2162295
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-07-29 12:45:40 -07:00

..

mmu_fault_gv11b_fusa.c

gpu: nvgpu: fix MISRA errors in nvgpu.hal.mm

2019-07-29 12:45:40 -07:00

mmu_fault_gv11b.h

gpu: nvgpu: Fixups for comment is new MM HAL code

2019-05-06 16:46:37 -07:00