Files
linux-nvgpu/drivers/gpu/nvgpu/common/pmu/volt/volt_dev.h
Abdul Salam 14b218c284 gpu: nvgpu: Refactor Clk, Volt sub-unit
As a part of refactoring, we need to move the volt unit from perf to pmu
as it belongs there and also move the arbitor specific functions under
CLK_ARB as they will be removed from safety build.
This patch does the following
*Move volt struct from perf to pmu
*Move volt setup from pmu_pstate to volt
*Move clk freq related functions into CLK_ARB

NVGPU-4491
NVGPU-4492

Change-Id: I7180cd12bbf91cc4d2e79b6e2d71c16e494c8ff0
Signed-off-by: Abdul Salam <absalam@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2268215
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
2020-12-15 14:10:29 -06:00

77 lines
2.3 KiB
C

/*
* Copyright (c) 2016-2019, NVIDIA CORPORATION. All rights reserved.
*
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* The above copyright notice and this permission notice shall be included in
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*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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*/
#ifndef NVGPU_VOLT_DEV_H
#define NVGPU_VOLT_DEV_H
#include <nvgpu/boardobj.h>
#include <nvgpu/boardobjgrp.h>
#include <nvgpu/pmu/pmuif/ctrlvolt.h>
#define VOLTAGE_TABLE_MAX_ENTRIES_ONE 1U
#define VOLTAGE_TABLE_MAX_ENTRIES 256U
#define VOLTAGE_DESCRIPTOR_TABLE_ENTRY_INVALID 0xFFU
#define VOLT_DEV_PWM_VOLTAGE_STEPS_INVALID 0U
#define VOLT_DEV_PWM_VOLTAGE_STEPS_DEFAULT 1U
struct voltage_device {
struct boardobj super;
u8 volt_domain;
u8 i2c_dev_idx;
u32 switch_delay_us;
u32 num_entries;
struct voltage_device_entry *pentry[VOLTAGE_TABLE_MAX_ENTRIES];
struct voltage_device_entry *pcurr_entry;
u8 rsvd_0;
u8 rsvd_1;
u8 operation_type;
u32 voltage_min_uv;
u32 voltage_max_uv;
u32 volt_step_uv;
};
struct voltage_device_entry {
u32 voltage_uv;
};
/*!
* Extends VOLTAGE_DEVICE providing attributes specific to PWM controllers.
*/
struct voltage_device_pwm {
struct voltage_device super;
s32 voltage_base_uv;
s32 voltage_offset_scale_uv;
enum nv_pmu_pmgr_pwm_source source;
u32 raw_period;
};
struct voltage_device_pwm_entry {
struct voltage_device_entry super;
u32 duty_cycle;
};
/* PWM end */
int nvgpu_volt_dev_sw_setup(struct gk20a *g);
int nvgpu_volt_dev_pmu_setup(struct gk20a *g);
#endif /* NVGPU_VOLT_DEV_H */