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16c511220e
This change adds gp10b to the nvgpu build as well as enabling CMA for buffer allocation. Change-Id: Id3d45ad6ffdab14120395952e68b285dd7364c76 Signed-off-by: Ken Adams <kadams@nvidia.com> Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/553324 GVS: Gerrit_Virtual_Submit
55 lines
1.3 KiB
C
55 lines
1.3 KiB
C
/*
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* GP10B GPU GR
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*
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* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#include "gk20a/gk20a.h" /* FERMI and MAXWELL classes defined here */
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#include "gk20a/gr_gk20a.h"
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#include "gm20b/gr_gm20b.h" /* for MAXWELL classes */
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#include "gp10b/gr_gp10b.h"
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bool gr_gp10b_is_valid_class(struct gk20a *g, u32 class_num)
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{
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bool valid = false;
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switch (class_num) {
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case PASCAL_COMPUTE_A:
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case PASCAL_A:
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case PASCAL_DMA_COPY_A:
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valid = true;
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break;
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case MAXWELL_COMPUTE_B:
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case MAXWELL_B:
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case FERMI_TWOD_A:
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case KEPLER_DMA_COPY_A:
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case MAXWELL_DMA_COPY_A:
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valid = true;
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break;
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default:
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break;
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}
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gk20a_dbg_info("class=0x%x valid=%d", class_num, valid);
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return valid;
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}
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void gp10b_init_gr(struct gpu_ops *gops)
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{
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gm20b_init_gr(gops);
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gops->gr.is_valid_class = gr_gp10b_is_valid_class;
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}
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