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18d1b1b536
In preparation for adding support for the upstream Host1x driver, add a layer of abstraction for calling the NVHost fence APIs. This provides a clean interface for calling the appropriate APIs for either the downstream NVHost fence APIs or the upstream DMA fence and Host1x APIs, depending on which is being used. Change-Id: I055aee3fe5d3af83ebb11126c0a862e17b21f94c Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2450244 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
119 lines
3.0 KiB
C
119 lines
3.0 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <uapi/linux/nvhost_ioctl.h>
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#include <linux/err.h>
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#include <nvgpu/errno.h>
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#include <nvgpu/types.h>
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#include <nvgpu/os_fence.h>
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#include <nvgpu/os_fence_syncpts.h>
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#include <nvgpu/nvhost.h>
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#include <nvgpu/atomic.h>
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#include <nvgpu/gk20a.h>
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#include <nvgpu/channel.h>
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#include <nvgpu/channel_sync.h>
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#include "os_fence_priv.h"
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#include "nvhost_priv.h"
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static int nvgpu_os_fence_syncpt_install_fd(struct nvgpu_os_fence *s,
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int fd)
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{
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return nvgpu_nvhost_fence_install(s->priv, fd);
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}
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static void nvgpu_os_fence_syncpt_drop_ref(struct nvgpu_os_fence *s)
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{
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nvgpu_nvhost_fence_put(s->priv);
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nvgpu_os_fence_clear(s);
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}
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static void nvgpu_os_fence_syncpt_dup(struct nvgpu_os_fence *s)
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{
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nvgpu_nvhost_fence_dup(s->priv);
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}
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static const struct nvgpu_os_fence_ops syncpt_ops = {
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.drop_ref = nvgpu_os_fence_syncpt_drop_ref,
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.install_fence = nvgpu_os_fence_syncpt_install_fd,
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.dup = nvgpu_os_fence_syncpt_dup,
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};
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int nvgpu_os_fence_syncpt_create(struct nvgpu_os_fence *fence_out,
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struct nvgpu_channel *c, struct nvgpu_nvhost_dev *nvhost_device,
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u32 id, u32 thresh)
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{
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struct nvhost_ctrl_sync_fence_info pt = {
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.id = id,
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.thresh = thresh,
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};
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struct nvhost_fence *fence;
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fence = nvgpu_nvhost_fence_create(nvhost_device->host1x_pdev, &pt, 1,
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"fence");
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if (IS_ERR(fence)) {
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nvgpu_err(c->g, "error %d during construction of fence.",
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(int)PTR_ERR(fence));
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return PTR_ERR(fence);
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}
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nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence);
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return 0;
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}
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int nvgpu_os_fence_syncpt_fdget(struct nvgpu_os_fence *fence_out,
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struct nvgpu_channel *c, int fd)
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{
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struct nvhost_fence *fence = nvgpu_nvhost_fence_get(fd);
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if (fence == NULL) {
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return -ENOMEM;
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}
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nvgpu_os_fence_init(fence_out, c->g, &syncpt_ops, fence);
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return 0;
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}
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int nvgpu_os_fence_get_syncpts(
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struct nvgpu_os_fence_syncpt *fence_syncpt_out,
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struct nvgpu_os_fence *fence_in)
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{
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if (fence_in->ops != &syncpt_ops) {
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return -EINVAL;
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}
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fence_syncpt_out->fence = fence_in;
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return 0;
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}
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u32 nvgpu_os_fence_syncpt_get_num_syncpoints(
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struct nvgpu_os_fence_syncpt *fence)
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{
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return nvgpu_nvhost_fence_num_pts(fence->fence->priv);
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}
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int nvgpu_os_fence_syncpt_foreach_pt(struct nvgpu_os_fence_syncpt *fence,
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int (*iter)(struct nvhost_ctrl_sync_fence_info, void *),
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void *data)
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{
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return nvgpu_nvhost_fence_foreach_pt(fence->fence->priv, iter, data);
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}
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