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69ef86e627
This patch moves all the safe static and non-static functions as well as its dependencies such as static declared structs into files with _fusa.c extension. If the original file is left with no functions remaining then the file is deleted. Added changes in Makefile, Makefile.sources, nvgpu-hal-new.yaml for compilation. Jira NVGPU-3690 Change-Id: I81af67c308705faf8a681df63a6778e7de2076cf Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2146761 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
63 lines
2.2 KiB
C
63 lines
2.2 KiB
C
/*
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* GP10B master
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*
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* Copyright (c) 2014-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include <nvgpu/io.h>
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#include <nvgpu/mc.h>
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#include <nvgpu/ltc.h>
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#include <nvgpu/engines.h>
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#include <nvgpu/power_features/pg.h>
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#include "mc_gp10b.h"
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#include <nvgpu/atomic.h>
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#include <nvgpu/unit.h>
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#include <nvgpu/hw/gp10b/hw_mc_gp10b.h>
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void mc_gp10b_intr_enable(struct gk20a *g)
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{
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u32 eng_intr_mask = nvgpu_engine_interrupt_mask(g);
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nvgpu_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_STALLING),
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U32_MAX);
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g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING] =
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mc_intr_pfifo_pending_f() |
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mc_intr_priv_ring_pending_f() |
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mc_intr_pbus_pending_f() |
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mc_intr_ltc_pending_f() |
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mc_intr_replayable_fault_pending_f() |
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eng_intr_mask;
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nvgpu_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_STALLING),
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g->mc_intr_mask_restore[NVGPU_MC_INTR_STALLING]);
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nvgpu_writel(g, mc_intr_en_clear_r(NVGPU_MC_INTR_NONSTALLING),
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U32_MAX);
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g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING] =
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mc_intr_pfifo_pending_f() |
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eng_intr_mask;
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nvgpu_writel(g, mc_intr_en_set_r(NVGPU_MC_INTR_NONSTALLING),
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g->mc_intr_mask_restore[NVGPU_MC_INTR_NONSTALLING]);
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}
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