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1a85ecf1ed
Move mmu_fault_info struct from mm.h to mmu_fault.h Rename and move below hash defines to mmu_fault.h NVGPU_MM_MMU_FAULT_TYPE_OTHER_AND_NONREPLAY -> NVGPU_MMU_FAULT_NONREPLAY_INDX NVGPU_MM_MMU_FAULT_TYPE_REPLAY -> NVGPU_MMU_FAULT_REPLAY_INDX FAULT_TYPE_NUM -> NVGPU_MMU_FAULT_TYPE_NUM NVGPU_FB_MMU_FAULT_NONREPLAY_REG_INDEX -> NVGPU_MMU_FAULT_NONREPLAY_REG_INDX NVGPU_FB_MMU_FAULT_REPLAY_REG_INDEX -> NVGPU_MMU_FAULT_REPLAY_REG_INDX NVGPU_FB_MMU_FAULT_BUF_DISABLED -> NVGPU_MMU_FAULT_BUF_DISABLED NVGPU_FB_MMU_FAULT_BUF_ENABLED -> NVGPU_MMU_FAULT_BUF_ENABLED JIRA NVGPU-1313 Change-Id: I3d4d56f881a5c3856c005db6dc7d850be4bc041d Signed-off-by: Seema Khowala <seemaj@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2107772 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_MMU_FAULT_H
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#define NVGPU_MMU_FAULT_H
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#include <nvgpu/types.h>
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#define NVGPU_MMU_FAULT_NONREPLAY_INDX 0U
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#define NVGPU_MMU_FAULT_REPLAY_INDX 1U
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/* replay and nonreplay faults */
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#define NVGPU_MMU_FAULT_TYPE_NUM 2U
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#define NVGPU_MMU_FAULT_NONREPLAY_REG_INDX 0U
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#define NVGPU_MMU_FAULT_REPLAY_REG_INDX 1U
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#define NVGPU_MMU_FAULT_BUF_DISABLED 0U
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#define NVGPU_MMU_FAULT_BUF_ENABLED 1U
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struct channel_gk20a;
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struct mmu_fault_info {
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u64 inst_ptr;
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u32 inst_aperture;
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u64 fault_addr;
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u32 fault_addr_aperture;
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u32 timestamp_lo;
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u32 timestamp_hi;
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u32 mmu_engine_id;
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u32 gpc_id;
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u32 client_type;
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u32 client_id;
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u32 fault_type;
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u32 access_type;
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u32 protected_mode;
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bool replayable_fault;
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u32 replay_fault_en;
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bool valid;
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u32 faulted_pbdma;
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u32 faulted_engine;
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u32 faulted_subid;
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u32 chid;
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struct channel_gk20a *refch;
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const char *client_type_desc;
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const char *fault_type_desc;
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const char *client_id_desc;
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};
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#endif /* NVGPU_MMU_FAULT_H */
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