Seema Khowala 1ab0eec6ea gpu: nvgpu: add resume_single_sm gr ops ...

This is required to support multiple SM and t19x
sm register address changes

JIRA GPUT19X-75

Change-Id: If8805bcc042c75ea70c1689306feb3c8bf011655
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master/r/1512216
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

2017-07-05 03:07:00 -07:00

..

nvgpu

gpu: nvgpu: add resume_single_sm gr ops

2017-07-05 03:07:00 -07:00