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3885fe099a
Moved pmuif/* headers to drivers/gpu/nvgpu/include/nvgpu folder to support cross platform feature implementation. Made changes to files which accessed include pmuif/* to reflect pmuif/* movement changes. Deleted includes of gk20a.h/pmu_gk20a.h from pmuif/*.h files. Jira NVGPU-19 Change-Id: Iace4e107c24bdaff08a407eae3b147959173e485 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1299823 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
61 lines
1.6 KiB
C
61 lines
1.6 KiB
C
/*
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* general power channel structures & definitions
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*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef _PWRMONITOR_H_
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#define _PWRMONITOR_H_
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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#include "boardobj/boardobjgrp.h"
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#include "boardobj/boardobj.h"
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#include "ctrl/ctrlpmgr.h"
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struct pwr_channel {
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struct boardobj super;
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u8 pwr_rail;
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u32 volt_fixed_uv;
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u32 pwr_corr_slope;
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s32 pwr_corr_offset_mw;
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u32 curr_corr_slope;
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s32 curr_corr_offset_ma;
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u32 dependent_ch_mask;
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};
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struct pwr_chrelationship {
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struct boardobj super;
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u8 chIdx;
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};
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struct pwr_channel_sensor {
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struct pwr_channel super;
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u8 pwr_dev_idx;
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u8 pwr_dev_prov_idx;
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};
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struct pmgr_pwr_monitor {
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bool b_is_topology_tbl_ver_1x;
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struct boardobjgrp_e32 pwr_channels;
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struct boardobjgrp_e32 pwr_ch_rels;
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u8 total_gpu_channel_idx;
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u32 physical_channel_mask;
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struct nv_pmu_pmgr_pwr_monitor_pack pmu_data;
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};
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#define PMGR_PWR_MONITOR_GET_PWR_CHANNEL(g, channel_idx) \
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((struct pwr_channel *)BOARDOBJGRP_OBJ_GET_BY_IDX( \
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&(g->pmgr_pmu.pmgr_monitorobjs.pwr_channels.super), (channel_idx)))
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u32 pmgr_monitor_sw_setup(struct gk20a *g);
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#endif
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