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MISRA Advisory Rule 2.5 states that a project should not contain unused macro declarations. While most of the violations in the nvgpu driver are due to unused macros from hw headers, devinit-related headers, etc. there is a small number that are due to things like: * macros not being used when they could/should be * macros in C files that are really not referenced * CPP build flag mismatches This change eliminates such violations from the following: * replace constants with existing macros in timeout conversion code * wrap nvgpu_gmmu_dbg macro #defines in #ifdef CONFIG_NVGPU_TRACE/#endif * wrap MAX_MC_INTR_REGS #define in #ifdef CONFIG_NVGPU_NON_FUSA/#endif * remove unused FECS_MAILBOX_0_ACK_RESTORE from runlist code * wrap BACKTRACE_MAXSIZE macro with #ifndef _QNX_SOURCE/#endif Jira NVGPU-3178 Change-Id: I2bc72f706d7af3f8e7b062126e8543d0dc8ac250 Signed-off-by: Scott Long <scottl@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2284419 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Vedashree Vidwans <vvidwans@nvidia.com> Reviewed-by: Sagar Kamble <skamble@nvidia.com> Reviewed-by: Adeel Raza <araza@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit
214 lines
5.0 KiB
C
214 lines
5.0 KiB
C
/*
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* Copyright (c) 2018-2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <sys/time.h>
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#include <time.h>
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#include <nvgpu/bug.h>
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#include <nvgpu/log.h>
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#include <nvgpu/timers.h>
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#include <nvgpu/soc.h>
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#define USEC_PER_MSEC 1000
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#define NSEC_PER_USEC 1000
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#define NSEC_PER_MSEC 1000000
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#define NSEC_PER_SEC 1000000000
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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#include <nvgpu/posix/posix-fault-injection.h>
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struct nvgpu_posix_fault_inj *nvgpu_timers_get_fault_injection(void)
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{
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struct nvgpu_posix_fault_inj_container *c =
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nvgpu_posix_fault_injection_get_container();
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return &c->timers_fi;
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}
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int nvgpu_timeout_expired_fault_injection(void)
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{
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bool count_set = nvgpu_posix_is_fault_injection_cntr_set(
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nvgpu_timers_get_fault_injection());
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bool fault_enabled = nvgpu_posix_fault_injection_handle_call(
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nvgpu_timers_get_fault_injection());
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if (count_set) {
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return 0;
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}
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if (fault_enabled) {
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return -ETIMEDOUT;
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}
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return -1;
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}
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#endif /* NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT */
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s64 nvgpu_current_time_us(void)
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{
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struct timeval now;
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s64 time_now;
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int ret;
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ret = gettimeofday(&now, NULL);
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if (ret != 0) {
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BUG();
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}
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time_now = nvgpu_safe_mult_s64((s64)now.tv_sec, (s64)NSEC_PER_MSEC);
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time_now = nvgpu_safe_add_s64(time_now, (s64)now.tv_usec);
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return time_now;
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}
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static s64 get_time_ns(void)
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{
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struct timespec ts;
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s64 t_ns;
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(void) clock_gettime(CLOCK_MONOTONIC, &ts);
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t_ns = nvgpu_safe_mult_s64(ts.tv_sec, NSEC_PER_SEC);
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t_ns = nvgpu_safe_add_s64(t_ns, ts.tv_nsec);
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return t_ns;
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}
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/*
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* Returns true if a > b;
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*/
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static bool time_after(s64 a, s64 b)
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{
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return (nvgpu_safe_sub_s64(a, b) > 0);
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}
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int nvgpu_timeout_init(struct gk20a *g, struct nvgpu_timeout *timeout,
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u32 duration, unsigned long flags)
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{
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s64 duration_ns;
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#ifdef NVGPU_UNITTEST_FAULT_INJECTION_ENABLEMENT
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if (nvgpu_posix_fault_injection_handle_call(
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nvgpu_timers_get_fault_injection())) {
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return -ETIMEDOUT;
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}
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#endif
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if ((flags & ~NVGPU_TIMER_FLAG_MASK) != 0U) {
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return -EINVAL;
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}
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(void) memset(timeout, 0, sizeof(*timeout));
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timeout->g = g;
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timeout->flags = (unsigned int)flags;
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if ((flags & NVGPU_TIMER_RETRY_TIMER) != 0U) {
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timeout->retries.max_attempts = duration;
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} else {
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duration_ns = (s64)duration;
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duration_ns = nvgpu_safe_mult_s64(duration_ns, NSEC_PER_MSEC);
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timeout->time = nvgpu_safe_add_s64(nvgpu_current_time_ns(),
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duration_ns);
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}
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return 0;
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}
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bool nvgpu_timeout_peek_expired(struct nvgpu_timeout *timeout)
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{
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if ((timeout->flags & NVGPU_TIMER_RETRY_TIMER) != 0U) {
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return (timeout->retries.attempted >=
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timeout->retries.max_attempts);
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} else {
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return time_after(get_time_ns(), timeout->time);
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}
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}
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static void nvgpu_usleep(unsigned int usecs)
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{
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struct timespec rqtp;
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s64 t_currentns, t_ns;
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t_currentns = get_time_ns();
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t_ns = (s64)usecs;
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t_ns = nvgpu_safe_mult_s64(t_ns, NSEC_PER_USEC);
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t_ns = nvgpu_safe_add_s64(t_ns, t_currentns);
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rqtp.tv_sec = t_ns / NSEC_PER_SEC;
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rqtp.tv_nsec = t_ns % NSEC_PER_SEC;
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(void) clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, &rqtp, NULL);
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}
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void nvgpu_udelay(unsigned int usecs)
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{
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if (usecs >= (unsigned int) 1000) {
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nvgpu_usleep(usecs);
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} else {
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nvgpu_delay_usecs(usecs);
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}
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}
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void nvgpu_usleep_range(unsigned int min_us, unsigned int max_us)
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{
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nvgpu_udelay(min_us);
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}
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void nvgpu_msleep(unsigned int msecs)
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{
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struct timespec rqtp;
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s64 t_currentns, t_ns;
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t_currentns = get_time_ns();
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t_ns = (s64)msecs;
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t_ns = nvgpu_safe_mult_s64(t_ns, NSEC_PER_MSEC);
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t_ns = nvgpu_safe_add_s64(t_ns, t_currentns);
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rqtp.tv_sec = t_ns / NSEC_PER_SEC;
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rqtp.tv_nsec = t_ns % NSEC_PER_SEC;
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(void) clock_nanosleep(CLOCK_MONOTONIC, TIMER_ABSTIME, &rqtp, NULL);
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}
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s64 nvgpu_current_time_ms(void)
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{
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return (s64)(get_time_ns() / NSEC_PER_MSEC);
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}
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s64 nvgpu_current_time_ns(void)
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{
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return get_time_ns();
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}
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u64 nvgpu_hr_timestamp(void)
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{
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return nvgpu_get_cycles();
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}
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#ifdef CONFIG_NVGPU_NON_FUSA
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u64 nvgpu_hr_timestamp_us(void)
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{
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return nvgpu_us_counter();
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}
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#endif
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