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221475f753
Support new IOCTL to manage PMA stream meta data by adding below API nvgpu_prof_ioctl_pma_stream_update_get_put() Add nvgpu_perfbuf_update_get_put() to handle all the updates coming from userspace and to pass all required information. Add gops.perf.update_get_put() to handle all HW accesses required in perf HW unit. Add gops.perf.bind_mem_bytes_buffer_addr() to bind the available bytes buffer while binding HWPM streamout. Bug 2510974 Jira NVGPU-5360 Change-Id: Ibacc2299b845e47776babc081759dfc4afde34fe Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2406484 Reviewed-by: automaticguardword <automaticguardword@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Antony Clince Alex <aalex@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> GVS: Gerrit_Virtual_Submit Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
75 lines
3.0 KiB
C
75 lines
3.0 KiB
C
/*
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* Copyright (c) 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_GOPS_DEBUGGER_H
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#define NVGPU_GOPS_DEBUGGER_H
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#ifdef CONFIG_NVGPU_DEBUGGER
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struct gops_regops {
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int (*exec_regops)(struct gk20a *g,
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struct nvgpu_tsg *tsg,
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struct nvgpu_dbg_reg_op *ops,
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u32 num_ops,
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u32 *flags);
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const struct regop_offset_range* (
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*get_global_whitelist_ranges)(void);
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u64 (*get_global_whitelist_ranges_count)(void);
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const struct regop_offset_range* (
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*get_context_whitelist_ranges)(void);
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u64 (*get_context_whitelist_ranges_count)(void);
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const u32* (*get_runcontrol_whitelist)(void);
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u64 (*get_runcontrol_whitelist_count)(void);
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};
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struct gops_debugger {
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void (*post_events)(struct nvgpu_channel *ch);
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int (*dbg_set_powergate)(struct dbg_session_gk20a *dbg_s,
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bool disable_powergate);
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};
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struct gops_perf {
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void (*enable_membuf)(struct gk20a *g, u32 size, u64 buf_addr);
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void (*disable_membuf)(struct gk20a *g);
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void (*bind_mem_bytes_buffer_addr)(struct gk20a *g, u64 buf_addr);
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void (*init_inst_block)(struct gk20a *g,
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struct nvgpu_mem *inst_block);
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void (*deinit_inst_block)(struct gk20a *g);
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void (*membuf_reset_streaming)(struct gk20a *g);
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u32 (*get_membuf_pending_bytes)(struct gk20a *g);
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void (*set_membuf_handled_bytes)(struct gk20a *g,
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u32 entries, u32 entry_size);
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bool (*get_membuf_overflow_status)(struct gk20a *g);
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u32 (*get_pmmsys_per_chiplet_offset)(void);
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u32 (*get_pmmgpc_per_chiplet_offset)(void);
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u32 (*get_pmmfbp_per_chiplet_offset)(void);
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int (*update_get_put)(struct gk20a *g, u64 bytes_consumed,
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bool update_available_bytes, u64 *put_ptr, bool *overflowed);
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};
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struct gops_perfbuf {
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int (*perfbuf_enable)(struct gk20a *g, u64 offset, u32 size);
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int (*perfbuf_disable)(struct gk20a *g);
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int (*init_inst_block)(struct gk20a *g);
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void (*deinit_inst_block)(struct gk20a *g);
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int (*update_get_put)(struct gk20a *g, u64 bytes_consumed, u64 *bytes_available,
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void *cpuva, bool wait, u64 *put_ptr, bool *overflowed);
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};
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#endif
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#endif /* NVGPU_GOPS_DEBUGGER_H */
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