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6eef1a486c
Add unit tests to cover the invalid falcon port access, falcon sw init switch cases, nvgpu_falcon_set_irq, nvgpu_timeout_init failure branch coverage. Compile out the functions nvgpu_falcon_get_mem_size & falcon_bootstrap as they are needed by LS PMU and VBIOS code. For iGPU safety the falcon functions needing these will call the HAL APIs directly. This way we avoid the unreachable code as well. Updated the prototype of falcon bootstrap HAL API as that doesn't return any error. With these changes, we get 100% line coverage for common.falcon unit. JIRA NVGPU-2214 Change-Id: I1fe653d97c1a6a1521d7da38f171928dda58c5b5 Signed-off-by: Sagar Kamble <skamble@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2258311 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
79 lines
2.8 KiB
C
79 lines
2.8 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef NVGPU_GOPS_FALCON_H
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#define NVGPU_GOPS_FALCON_H
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#include <nvgpu/types.h>
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/**
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* @file
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*
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* Falcon HAL interface.
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*/
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struct gk20a;
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struct gops_falcon {
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/** @cond DOXYGEN_SHOULD_SKIP_THIS */
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int (*falcon_sw_init)(struct gk20a *g, u32 flcn_id);
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void (*falcon_sw_free)(struct gk20a *g, u32 flcn_id);
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void (*reset)(struct nvgpu_falcon *flcn);
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bool (*is_falcon_cpu_halted)(struct nvgpu_falcon *flcn);
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bool (*is_falcon_idle)(struct nvgpu_falcon *flcn);
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bool (*is_falcon_scrubbing_done)(struct nvgpu_falcon *flcn);
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u32 (*get_mem_size)(struct nvgpu_falcon *flcn,
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enum falcon_mem_type mem_type);
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u8 (*get_ports_count)(struct nvgpu_falcon *flcn,
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enum falcon_mem_type mem_type);
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int (*copy_to_dmem)(struct nvgpu_falcon *flcn,
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u32 dst, u8 *src, u32 size, u8 port);
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int (*copy_to_imem)(struct nvgpu_falcon *flcn,
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u32 dst, u8 *src, u32 size, u8 port,
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bool sec, u32 tag);
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void (*bootstrap)(struct nvgpu_falcon *flcn,
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u32 boot_vector);
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u32 (*mailbox_read)(struct nvgpu_falcon *flcn,
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u32 mailbox_index);
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void (*mailbox_write)(struct nvgpu_falcon *flcn,
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u32 mailbox_index, u32 data);
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void (*set_irq)(struct nvgpu_falcon *flcn, bool enable,
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u32 intr_mask, u32 intr_dest);
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#ifdef CONFIG_NVGPU_FALCON_DEBUG
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void (*dump_falcon_stats)(struct nvgpu_falcon *flcn);
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#endif
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#ifdef CONFIG_NVGPU_FALCON_NON_FUSA
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bool (*clear_halt_interrupt_status)(struct nvgpu_falcon *flcn);
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int (*copy_from_dmem)(struct nvgpu_falcon *flcn,
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u32 src, u8 *dst, u32 size, u8 port);
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int (*copy_from_imem)(struct nvgpu_falcon *flcn,
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u32 src, u8 *dst, u32 size, u8 port);
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void (*get_falcon_ctls)(struct nvgpu_falcon *flcn,
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u32 *sctl, u32 *cpuctl);
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#endif
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/** @endcond DOXYGEN_SHOULD_SKIP_THIS */
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};
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#endif
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