mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
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25440e63d2
Move gk20a/platform_gk20a.h to linux specific directory as common/linux/platform_gk20a.h since this file includes all linux specific stuff Fix #includes in all the files to include this file with correct path Remove #include of this file where it is no more needed Fix gk20a_init_sim_support() to receive struct gk20a as parameter instead of receiving linux specific struct platform_device NVGPU-316 Change-Id: I5ec08e776b753af4d39d11c11f6f068be2ac236f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1589938 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
143 lines
3.8 KiB
C
143 lines
3.8 KiB
C
/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <linux/tegra_vgpu.h>
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#include "gk20a/gk20a.h"
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#include "gk20a/channel_gk20a.h"
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#include "gk20a/tsg_gk20a.h"
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#include "common/linux/platform_gk20a.h"
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#include "vgpu.h"
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#include "fifo_vgpu.h"
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#include <nvgpu/bug.h>
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int vgpu_tsg_open(struct tsg_gk20a *tsg)
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{
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_tsg_open_params *p =
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&msg.params.tsg_open;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_TSG_OPEN;
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msg.handle = vgpu_get_handle(tsg->g);
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p->tsg_id = tsg->tsgid;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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nvgpu_err(tsg->g,
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"vgpu_tsg_open failed, tsgid %d", tsg->tsgid);
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}
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return err;
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}
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int vgpu_enable_tsg(struct tsg_gk20a *tsg)
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{
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struct gk20a *g = tsg->g;
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struct channel_gk20a *ch;
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nvgpu_rwsem_down_read(&tsg->ch_list_lock);
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nvgpu_list_for_each_entry(ch, &tsg->ch_list, channel_gk20a, ch_entry)
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g->ops.fifo.enable_channel(ch);
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nvgpu_rwsem_up_read(&tsg->ch_list_lock);
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return 0;
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}
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int vgpu_tsg_bind_channel(struct tsg_gk20a *tsg,
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struct channel_gk20a *ch)
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{
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_tsg_bind_unbind_channel_params *p =
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&msg.params.tsg_bind_unbind_channel;
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int err;
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gk20a_dbg_fn("");
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err = gk20a_tsg_bind_channel(tsg, ch);
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if (err)
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return err;
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msg.cmd = TEGRA_VGPU_CMD_TSG_BIND_CHANNEL;
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msg.handle = vgpu_get_handle(tsg->g);
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p->tsg_id = tsg->tsgid;
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p->ch_handle = ch->virt_ctx;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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if (err) {
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nvgpu_err(tsg->g,
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"vgpu_tsg_bind_channel failed, ch %d tsgid %d",
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ch->chid, tsg->tsgid);
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gk20a_tsg_unbind_channel(ch);
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}
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return err;
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}
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int vgpu_tsg_unbind_channel(struct channel_gk20a *ch)
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{
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struct tegra_vgpu_cmd_msg msg = {};
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struct tegra_vgpu_tsg_bind_unbind_channel_params *p =
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&msg.params.tsg_bind_unbind_channel;
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int err;
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gk20a_dbg_fn("");
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err = gk20a_tsg_unbind_channel(ch);
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if (err)
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return err;
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msg.cmd = TEGRA_VGPU_CMD_TSG_UNBIND_CHANNEL;
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msg.handle = vgpu_get_handle(ch->g);
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p->ch_handle = ch->virt_ctx;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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WARN_ON(err);
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return err;
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}
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int vgpu_tsg_set_timeslice(struct tsg_gk20a *tsg, u32 timeslice)
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{
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struct tegra_vgpu_cmd_msg msg = {0};
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struct tegra_vgpu_tsg_timeslice_params *p =
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&msg.params.tsg_timeslice;
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int err;
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gk20a_dbg_fn("");
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msg.cmd = TEGRA_VGPU_CMD_TSG_SET_TIMESLICE;
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msg.handle = vgpu_get_handle(tsg->g);
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p->tsg_id = tsg->tsgid;
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p->timeslice_us = timeslice;
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err = vgpu_comm_sendrecv(&msg, sizeof(msg), sizeof(msg));
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err = err ? err : msg.ret;
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WARN_ON(err);
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if (!err)
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tsg->timeslice_us = timeslice;
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return err;
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}
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