mirror of
git://nv-tegra.nvidia.com/linux-nvgpu.git
synced 2025-12-23 18:16:01 +03:00
6f9dfeaab1
The following misra violations are fixed in the current patch. 1) misra_c_2012_directive_4_7_violation: Calling function "nvgpu_report_host_err" which returns error information without testing the error information. 2) misra_c_2012_directive_4_7_violation: The variable "intr_0_en_mask" which contains error information hasn't been tested. 3) misra_c_2012_directive_4_7_violation: Calling function "gv11b_fifo_intr_0_error_mask(g)" which returns error information without testing the error information. 4) misra_c_2012_rule_8_6_violation: "gk20a_fifo_bar1_snooping_disable" is declared but never defined. 5) misra_c_2012_rule_8_6_violation: "gm20b_fuse_check_priv_security" is declared but never defined. 6) misra_c_2012_rule_8_6_violation: "gm20b_fuse_status_opt_gpc" is declared but never defined. Jira NVGPU-3881 Change-Id: I731cd1d99649e07cb39aa75c4715e17eedd4d927 Signed-off-by: Debarshi Dutta <ddutta@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2188161 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
48 lines
1.9 KiB
C
48 lines
1.9 KiB
C
/*
|
|
* GM20B FUSE
|
|
*
|
|
* Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved.
|
|
*
|
|
* Permission is hereby granted, free of charge, to any person obtaining a
|
|
* copy of this software and associated documentation files (the "Software"),
|
|
* to deal in the Software without restriction, including without limitation
|
|
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
|
|
* and/or sell copies of the Software, and to permit persons to whom the
|
|
* Software is furnished to do so, subject to the following conditions:
|
|
*
|
|
* The above copyright notice and this permission notice shall be included in
|
|
* all copies or substantial portions of the Software.
|
|
*
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
|
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
|
|
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
|
|
* DEALINGS IN THE SOFTWARE.
|
|
*/
|
|
|
|
#ifndef NVGPU_FUSE_GM20B_H
|
|
#define NVGPU_FUSE_GM20B_H
|
|
|
|
#define GCPLEX_CONFIG_VPR_AUTO_FETCH_DISABLE_MASK BIT32(0)
|
|
#define GCPLEX_CONFIG_VPR_ENABLED_MASK BIT32(1)
|
|
#define GCPLEX_CONFIG_WPR_ENABLED_MASK BIT32(2)
|
|
|
|
|
|
struct gk20a;
|
|
|
|
#ifdef CONFIG_NVGPU_HAL_NON_FUSA
|
|
int gm20b_fuse_check_priv_security(struct gk20a *g);
|
|
u32 gm20b_fuse_status_opt_gpc(struct gk20a *g);
|
|
#endif
|
|
u32 gm20b_fuse_status_opt_fbio(struct gk20a *g);
|
|
u32 gm20b_fuse_status_opt_fbp(struct gk20a *g);
|
|
u32 gm20b_fuse_status_opt_rop_l2_fbp(struct gk20a *g, u32 fbp);
|
|
u32 gm20b_fuse_status_opt_tpc_gpc(struct gk20a *g, u32 gpc);
|
|
void gm20b_fuse_ctrl_opt_tpc_gpc(struct gk20a *g, u32 gpc, u32 val);
|
|
u32 gm20b_fuse_opt_sec_debug_en(struct gk20a *g);
|
|
u32 gm20b_fuse_opt_priv_sec_en(struct gk20a *g);
|
|
|
|
#endif /* NVGPU_FUSE_GM20B_H */
|