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5e688c35f8
For MMU and PBDMA faults, error notifier needs to be set before entering SW quiesce. Otherwise it ends up with default NVGPU_ERR_NOTIFIER_FIFO_ERROR_IDLE_TIMEOUT. Added nvgpu_rc_mmu_fault to: - call g->ops.fifo.recover when recovery is enabled - set MMU error when recovery is disabled Updated nvgpu_rc_pbdma_fault to set PBDMA error when recovery is disabled as well. Wait for deferred interrupts to complete before actually entering SW quiesce state, to make sure error notifier has been set. Jira NVGPU-4127 Change-Id: Ia84c723e021e397391c6c609d4bb96c06afdcc47 Signed-off-by: Thomas Fleury <tfleury@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2210909 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Deepak Nibade <dnibade@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>