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dfdd05a3d6
Compile all files with fecs trace support only if flag NVGPU_FECS_TRACE_SUPPORT is set remove CONFIG_GK20A_CTXSW_TRACE checks from within the files add POSIX file for fecs trace support for compilation with make command Jira NVGPU-3414 Change-Id: I205e3494ce94138ab6c6fccf7fbcefc41f953c77 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/2120276 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: Thomas Fleury <tfleury@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
73 lines
1.8 KiB
C
73 lines
1.8 KiB
C
/*
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* Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <nvgpu/types.h>
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#include <nvgpu/gr/fecs_trace.h>
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int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size);
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void vgpu_fecs_trace_data_update(struct gk20a *g);
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void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
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void **mmapaddr, size_t *mmapsize);
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int nvgpu_gr_fecs_trace_ring_alloc(struct gk20a *g,
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void **buf, size_t *size)
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{
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return -EINVAL;
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}
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int nvgpu_gr_fecs_trace_ring_free(struct gk20a *g)
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{
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return -EINVAL;
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}
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void nvgpu_gr_fecs_trace_get_mmap_buffer_info(struct gk20a *g,
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void **mmapaddr, size_t *mmapsize)
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{
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}
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int nvgpu_gr_fecs_trace_write_entry(struct gk20a *g,
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struct nvgpu_gpu_ctxsw_trace_entry *entry)
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{
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return -EINVAL;
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}
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void nvgpu_gr_fecs_trace_wake_up(struct gk20a *g, int vmid)
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{
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}
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void nvgpu_gr_fecs_trace_add_tsg_reset(struct gk20a *g, struct nvgpu_tsg *tsg)
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{
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}
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u8 nvgpu_gpu_ctxsw_tags_to_common_tags(u8 tags)
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{
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return 0;
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}
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int vgpu_alloc_user_buffer(struct gk20a *g, void **buf, size_t *size)
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{
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return -EINVAL;
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}
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void vgpu_fecs_trace_data_update(struct gk20a *g)
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{
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}
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void vgpu_get_mmap_user_buffer_info(struct gk20a *g,
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void **mmapaddr, size_t *mmapsize)
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{
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}
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