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- Added support for below multiple therm sensor device & defined macros GPC_TSOSC GPC SCI HBM2_SITE HBM2_COMBINED - Added PMU interface for listed therm sensor device - Added nvgpu interface for listed therm sensor device - Added construct boardobj support for listed therm sensor device & called to update nvgpu interface. - Updated devinit_get_therm_device_table() to read sensor info from therm device table from vbios table & construct respective therm device boardobj using construct_therm_device_*() based on class_id param read from vbios table. - Updated RPC handler to handle THERM ack request - Updated gv100 therm ops "get_internal_sensor_limits" to point to gp106_get_internal_sensor_limits() Change-Id: I4b4ed501d0625cb8fc7b300c820622e40ae59fe6 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1676785 Reviewed-by: svc-misra-checker <svc-misra-checker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Vaikundanathan S <vaikuns@nvidia.com> Tested-by: Vaikundanathan S <vaikuns@nvidia.com> Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
368 lines
10 KiB
C
368 lines
10 KiB
C
/*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/bios.h>
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#include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h>
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#include "gk20a/gk20a.h"
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#include "thrmdev.h"
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#include "boardobj/boardobjgrp.h"
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#include "boardobj/boardobjgrp_e32.h"
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#include "gp106/bios_gp106.h"
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#include "ctrl/ctrltherm.h"
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static u32 _therm_device_pmudata_instget(struct gk20a *g,
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struct nv_pmu_boardobjgrp *pmuboardobjgrp,
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struct nv_pmu_boardobj **ppboardobjpmudata,
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u8 idx)
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{
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struct nv_pmu_therm_therm_device_boardobj_grp_set *pgrp_set =
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(struct nv_pmu_therm_therm_device_boardobj_grp_set *)
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pmuboardobjgrp;
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nvgpu_log_info(g, " ");
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/*check whether pmuboardobjgrp has a valid boardobj in index*/
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if (((u32)BIT(idx) &
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pgrp_set->hdr.data.super.obj_mask.super.data[0]) == 0)
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return -EINVAL;
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*ppboardobjpmudata = (struct nv_pmu_boardobj *)
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&pgrp_set->objects[idx].data;
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nvgpu_log_info(g, " Done");
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return 0;
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}
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static u32 construct_therm_device(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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return boardobj_construct_super(g, ppboardobj, size, pargs);
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}
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static u32 construct_therm_device_gpu(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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return construct_therm_device(g, ppboardobj, size, pargs);
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}
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static u32 construct_therm_device_gpu_sci(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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return construct_therm_device(g, ppboardobj, size, pargs);
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}
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static u32 therm_device_pmu_data_init_gpu_gpc_tsosc(struct gk20a *g,
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struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
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{
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u32 status = 0;
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struct therm_device_gpu_gpc_tsosc *pdev = NULL;
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struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *pset;
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status = boardobj_pmudatainit_super(g, pboard_obj, ppmudata);
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if (status != 0) {
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goto exit;
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}
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pdev = (struct therm_device_gpu_gpc_tsosc *)(void *)pboard_obj;
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pset = (struct nv_pmu_therm_therm_device_gpu_gpc_tsosc_boardobj_set *)
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(void*) ppmudata;
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pset->gpc_tsosc_idx = pdev->gpc_tsosc_idx;
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exit:
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return status;
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}
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static u32 construct_therm_device_gpu_tsosc(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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struct therm_device_gpu_gpc_tsosc *pdev = NULL;
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struct therm_device_gpu_gpc_tsosc *ptmp_dev =
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(struct therm_device_gpu_gpc_tsosc *)pargs;
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u32 status = 0;
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status = construct_therm_device(g, ppboardobj, size, pargs);
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if (status != 0) {
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return status;
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}
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pdev = (struct therm_device_gpu_gpc_tsosc *)(void *)*ppboardobj;
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pdev->super.super.pmudatainit =
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therm_device_pmu_data_init_gpu_gpc_tsosc;
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pdev->gpc_tsosc_idx = ptmp_dev->gpc_tsosc_idx;
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return status;
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}
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static u32 therm_device_pmu_data_init_hbm2_site(struct gk20a *g,
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struct boardobj *pboard_obj, struct nv_pmu_boardobj *ppmudata)
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{
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u32 status = 0;
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struct therm_device_hbm2_site *pdev = NULL;
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struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *pset;
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status = boardobj_pmudatainit_super(g, pboard_obj, ppmudata);
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if (status != 0) {
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goto exit;
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}
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pdev = (struct therm_device_hbm2_site *)(void *)pboard_obj;
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pset = (struct nv_pmu_therm_therm_device_hbm2_site_boardobj_set *)
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(void *)ppmudata;
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pset->site_idx = pdev->site_idx;
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exit:
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return status;
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}
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static u32 construct_therm_device_hbm2_site(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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struct therm_device_hbm2_site *pdev = NULL;
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struct therm_device_hbm2_site *ptmp_dev =
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(struct therm_device_hbm2_site *)pargs;
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u32 status = 0;
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status = construct_therm_device(g, ppboardobj, size, pargs);
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if (status != 0) {
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return status;
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}
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pdev = (struct therm_device_hbm2_site *)(void *)*ppboardobj;
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pdev->super.super.pmudatainit =
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therm_device_pmu_data_init_hbm2_site;
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pdev->site_idx = ptmp_dev->site_idx;
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return status;
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}
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static u32 construct_therm_device_hbm2_combined(struct gk20a *g,
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struct boardobj **ppboardobj, u16 size, void *pargs)
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{
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return construct_therm_device(g, ppboardobj, size, pargs);
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}
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static struct boardobj *therm_device_construct(struct gk20a *g,
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void *pargs)
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{
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struct boardobj *board_obj_ptr = NULL;
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u32 status = 0;
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switch (BOARDOBJ_GET_TYPE(pargs)) {
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU:
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status = construct_therm_device_gpu(g, &board_obj_ptr,
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sizeof(struct therm_device), pargs);
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU_GPC_SCI:
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status = construct_therm_device_gpu_sci(g, &board_obj_ptr,
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sizeof(struct therm_device_gpu_sci), pargs);
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU_GPC_TSOSC:
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status = construct_therm_device_gpu_tsosc(g, &board_obj_ptr,
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sizeof(struct therm_device_gpu_gpc_tsosc), pargs);
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_HBM2_SITE:
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status = construct_therm_device_hbm2_site(g, &board_obj_ptr,
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sizeof(struct therm_device_hbm2_site), pargs);
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_HBM2_COMBINED:
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status = construct_therm_device_hbm2_combined(g, &board_obj_ptr,
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sizeof(struct therm_device_hbm2_combined), pargs);
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break;
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default:
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nvgpu_err(g,
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"unsupported therm_device class - 0x%x",
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BOARDOBJ_GET_TYPE(pargs));
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break;
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}
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if(status) {
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board_obj_ptr = NULL;
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nvgpu_err(g,
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"could not allocate memory for therm_device");
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if (board_obj_ptr != NULL)
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nvgpu_kfree(g, board_obj_ptr);
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}
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return board_obj_ptr;
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}
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static u32 devinit_get_therm_device_table(struct gk20a *g,
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struct therm_devices *pthermdeviceobjs)
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{
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u32 status = 0;
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u8 *therm_device_table_ptr = NULL;
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u8 *curr_therm_device_table_ptr = NULL;
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struct boardobj *boardobj;
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struct therm_device_1x_header therm_device_table_header = { 0 };
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struct therm_device_1x_entry *therm_device_table_entry = NULL;
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u32 index;
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u32 obj_index = 0;
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u8 class_id = 0;
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union {
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struct boardobj boardobj;
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struct therm_device therm_device;
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struct therm_device_gpu_sci gpu_sci;
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struct therm_device_gpu_gpc_tsosc gpu_gpc_tsosc;
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struct therm_device_hbm2_site hbm2_site;
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struct therm_device_hbm2_combined hbm2_combined;
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} therm_device_data;
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nvgpu_log_info(g, " ");
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therm_device_table_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
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g->bios.perf_token, THERMAL_DEVICE_TABLE);
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if (therm_device_table_ptr == NULL) {
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status = -EINVAL;
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goto done;
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}
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memcpy(&therm_device_table_header, therm_device_table_ptr,
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VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04);
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if (therm_device_table_header.version !=
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VBIOS_THERM_DEVICE_VERSION_1X) {
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status = -EINVAL;
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goto done;
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}
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if (therm_device_table_header.header_size <
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VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04) {
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status = -EINVAL;
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goto done;
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}
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curr_therm_device_table_ptr = (therm_device_table_ptr +
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VBIOS_THERM_DEVICE_1X_HEADER_SIZE_04);
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for (index = 0; index < therm_device_table_header.num_table_entries;
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index++) {
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therm_device_table_entry = (struct therm_device_1x_entry *)
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(curr_therm_device_table_ptr +
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(therm_device_table_header.table_entry_size * index));
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class_id = therm_device_table_entry->class_id;
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switch (class_id) {
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_INVALID:
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continue;
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU:
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU_GPC_SCI:
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_GPU_GPC_TSOSC:
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therm_device_data.gpu_gpc_tsosc.gpc_tsosc_idx =
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therm_device_table_entry->param0;
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_HBM2_SITE:
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therm_device_data.hbm2_site.site_idx =
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therm_device_table_entry->param0;
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break;
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case NV_VBIOS_THERM_DEVICE_1X_ENTRY_CLASS_HBM2_COMBINED:
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break;
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default:
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nvgpu_err(g,
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"Unknown thermal device class i - %x, class - %x",
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index, class_id);
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goto done;
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}
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therm_device_data.boardobj.type = class_id;
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boardobj = therm_device_construct(g, &therm_device_data);
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if (!boardobj) {
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nvgpu_err(g,
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"unable to create thermal device for %d type %d",
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index, therm_device_data.boardobj.type);
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status = -EINVAL;
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goto done;
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}
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status = boardobjgrp_objinsert(&pthermdeviceobjs->super.super,
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boardobj, obj_index);
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if (status) {
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nvgpu_err(g,
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"unable to insert thermal device boardobj for %d", index);
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status = -EINVAL;
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goto done;
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}
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++obj_index;
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}
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done:
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nvgpu_log_info(g, " done status %x", status);
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return status;
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}
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u32 therm_device_sw_setup(struct gk20a *g)
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{
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u32 status;
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struct boardobjgrp *pboardobjgrp = NULL;
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struct therm_devices *pthermdeviceobjs;
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/* Construct the Super Class and override the Interfaces */
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status = boardobjgrpconstruct_e32(g,
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&g->therm_pmu.therm_deviceobjs.super);
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if (status) {
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nvgpu_err(g,
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"error creating boardobjgrp for therm devices, status - 0x%x",
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status);
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goto done;
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}
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pboardobjgrp = &g->therm_pmu.therm_deviceobjs.super.super;
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pthermdeviceobjs = &(g->therm_pmu.therm_deviceobjs);
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/* Override the Interfaces */
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pboardobjgrp->pmudatainstget = _therm_device_pmudata_instget;
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status = devinit_get_therm_device_table(g, pthermdeviceobjs);
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if (status)
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goto done;
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BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, THERM, THERM_DEVICE);
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status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
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therm, THERM, therm_device, THERM_DEVICE);
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if (status) {
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nvgpu_err(g,
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"error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
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status);
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goto done;
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}
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done:
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nvgpu_log_info(g, " done status %x", status);
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return status;
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}
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