Seshendra Gadagottu 26f98f0956 gpu: nvgpu: register usage optimizations ...

With hw minimal headers, lot of unwanted hw registers are stripped.
SW needed few updates to use minimal headers:

1. Use stride value to get non zero instance offset:
gr_pri_gpc0_tpc1_tpccs_tpc_activity_0_r() =
	gr_pri_gpc0_tpc0_tpccs_tpc_activity_0_r() +
        nvgpu_get_litter_value(g, GPU_LIT_TPC_IN_GPC_STRIDE);
gr_pri_be1_becs_be_activity0_r() = gr_pri_be0_becs_be_activity0_r() +
		nvgpu_get_litter_value(g, GPU_LIT_ROP_STRIDE);

2. Broadcast registers should not be used for reading status and
they should be used only for broadcast register writes. Removed
following register reads from gm20b register dump:
NV_PGRAPH_PRI_GPCS_TPC0_TPCCS_TPC_ACTIVITY0
NV_PGRAPH_PRI_GPCS_TPC1_TPCCS_TPC_ACTIVITY0

Above optimizations are done for gm20b, gp10b and gv11b.

JIRA NVGPU-2917
JIRA NVGPU-2918
JIRA NVGPU-2919

Change-Id: Ia8c736639f7cada0cf9f0d227dac372bdf09e55b
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/2088128
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

2019-04-04 13:27:56 -07:00

..

nvgpu

gpu: nvgpu: register usage optimizations

2019-04-04 13:27:56 -07:00

Makefile

nvgpu: use kernel overlay features

2017-10-29 11:00:55 -07:00