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c94643155e
MISRA rule 14.4 doesn't allow the usage of integer types as booleans in the controlling expression of an if statement or an iteration statement. Fix violations where the integer variables err, ret, status are used as booleans in the controlling expression of if and loop statements. JIRA NVGPU-1019 Change-Id: I8c9ad786a741b78293d0ebc4e1c33d4d0fc8f9b4 Signed-off-by: Amurthyreddy <amurthyreddy@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1921260 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
57 lines
1.9 KiB
C
57 lines
1.9 KiB
C
/*
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* GP10B GPU FECS traces
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*
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* Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <nvgpu/gk20a.h>
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#include "gk20a/fecs_trace_gk20a.h"
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#include "fecs_trace_gp10b.h"
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#include <nvgpu/hw/gp10b/hw_ctxsw_prog_gp10b.h>
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#include <nvgpu/hw/gp10b/hw_gr_gp10b.h>
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#ifdef CONFIG_GK20A_CTXSW_TRACE
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int gp10b_fecs_trace_flush(struct gk20a *g)
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{
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struct fecs_method_op_gk20a op = {
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.mailbox = { .id = 0, .data = 0,
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.clr = ~0, .ok = 0, .fail = 0},
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.method.addr = gr_fecs_method_push_adr_write_timestamp_record_v(),
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.method.data = 0,
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.cond.ok = GR_IS_UCODE_OP_NOT_EQUAL,
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.cond.fail = GR_IS_UCODE_OP_SKIP,
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};
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int err;
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nvgpu_log(g, gpu_dbg_fn|gpu_dbg_ctxsw, " ");
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err = gr_gk20a_elpg_protected_call(g,
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gr_gk20a_submit_fecs_method_op(g, op, false));
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if (err != 0)
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nvgpu_err(g, "write timestamp record failed");
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return err;
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}
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#endif /* CONFIG_GK20A_CTXSW_TRACE */
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