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282be07995
There are 2 issues here: 1. top_en register is being masked for each leaf level interrupt disable operation. top_en bit should be disabled as part of top level stall operation only. 2. Wrong mask is being calculated to disable the leaf_en bits for a unit which inturn affects the entire subtree. Subtree_mask_restore for a subtree stores the last state of interrupts that are enabled. As part of disable operation, we only need to update subtree_mask_restore and not reupdate subtree_mask for that subtree. Same logic applies to enable operation. Renamed the apis to better reflect their operation. The interrupt disabling is done at unit level and not subtree level. Bug 3712884 Change-Id: Id840c77f612021a303cfe0e8dca69386bc570273 Signed-off-by: Kishan <kpalankar@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/c/linux-nvgpu/+/2752541 Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: svc-mobile-misra <svc-mobile-misra@nvidia.com> Reviewed-by: svc-mobile-cert <svc-mobile-cert@nvidia.com> Reviewed-by: Tejal Kudav <tkudav@nvidia.com> Reviewed-by: Deepak Goyal <dgoyal@nvidia.com> GVS: Gerrit_Virtual_Submit